} embeddedice_reg_t;
extern reg_cache_t* embeddedice_build_reg_cache(target_t *target, arm7_9_common_t *arm7_9);
+extern int embeddedice_setup(target_t *target);
extern int embeddedice_read_reg(reg_t *reg);
extern int embeddedice_write_reg(reg_t *reg, u32 value);
extern int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask);
/* If many embeddedice_write_reg() follow eachother, then the >1 invocations can be this faster version of
* embeddedice_write_reg
*/
-static __inline void embeddedice_write_reg_inner(reg_t *reg, u32 value)
+static const int embeddedice_num_bits[]={32,5,1};
+static __inline__ void embeddedice_write_reg_inner(int chain_pos, int reg_addr, u32 value)
{
- embeddedice_reg_t *ice_reg = reg->arch_info;
- u8 reg_addr = ice_reg->addr & 0x1f;
- jtag_add_shift(TAP_SD, TAP_PD, 32, value);
- jtag_add_shift(TAP_SD, TAP_PD, 5, reg_addr);
- jtag_add_shift(TAP_SD, TAP_RTI, 1, 1);
+ u32 values[3];
+
+ values[0]=value;
+ values[1]=reg_addr;
+ values[2]=1;
+
+ jtag_add_dr_out(chain_pos,
+ 3,
+ embeddedice_num_bits,
+ values,
+ -1);
}