- fixes issue with reset and arm926ejs core. Thanks Øyvind Harboe

[openocd] / src / target / embeddedice.h

diff --git a/src/target/embeddedice.h b/src/target/embeddedice.h
index 0062153f15f39d3382356b45ad4015fe442172ef..9915e49b27241fe2ff9ccd2d7e10d83fb5174ba6 100644 (file)
--- a/src/target/embeddedice.h
+++ b/src/target/embeddedice.h
@@ -1,5 +1,5 @@
 /***************************************************************************
- *   Copyright (C) 2005 by Dominic Rath                                    *
+ *   Copyright (C) 2005, 2006 by Dominic Rath                              *
  *   Dominic.Rath@gmx.de                                                   *
  *                                                                         *
  *   This program is free software; you can redistribute it and/or modify  *
@@ -23,6 +23,7 @@
 #include "target.h"
 #include "register.h"
 #include "arm_jtag.h"
+#include "arm7_9_common.h"
 
 enum
 {
@@ -41,11 +42,14 @@ enum
        EICE_W1_DATA_VALUE = 12,
        EICE_W1_DATA_MASK = 13,
        EICE_W1_CONTROL_VALUE = 14,
-       EICE_W1_CONTROL_MASK = 15
+       EICE_W1_CONTROL_MASK = 15,
+       EICE_VEC_CATCH = 16
 };
 
 enum
 {
+       EICE_DBG_CONTROL_ICEDIS = 5,
+       EICE_DBG_CONTROL_MONEN = 4,     
        EICE_DBG_CONTROL_INTDIS = 2,
        EICE_DBG_CONTROL_DBGRQ = 1,
        EICE_DBG_CONTROL_DBGACK = 0,
@@ -53,6 +57,7 @@ enum
 
 enum
 {
+       EICE_DBG_STATUS_IJBIT = 5,
        EICE_DBG_STATUS_ITBIT = 4,
        EICE_DBG_STATUS_SYSCOMP = 3,
        EICE_DBG_STATUS_IFEN = 2,
@@ -73,18 +78,27 @@ enum
        EICE_W_CTRL_nRW = 0x1
 };
 
+enum
+{
+       EICE_COMM_CTRL_WBIT = 1,
+       EICE_COMM_CTRL_RBIT = 0
+};
+
 typedef struct embeddedice_reg_s
 {
        int addr;
        arm_jtag_t *jtag_info;
 } embeddedice_reg_t;
 
-extern reg_cache_t* embeddedice_build_reg_cache(target_t *target, arm_jtag_t *jtag_info, int extra_reg);
+extern reg_cache_t* embeddedice_build_reg_cache(target_t *target, arm7_9_common_t *arm7_9);
 extern int embeddedice_read_reg(reg_t *reg);
 extern int embeddedice_write_reg(reg_t *reg, u32 value);
 extern int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask);
 extern int embeddedice_store_reg(reg_t *reg);
 extern int embeddedice_set_reg(reg_t *reg, u32 value);
-extern int embeddedice_set_reg_w_exec(reg_t *reg, u32 value);
+extern int embeddedice_set_reg_w_exec(reg_t *reg, u8 *buf);
+extern int embeddedice_receive(arm_jtag_t *jtag_info, u32 *data, u32 size);
+extern int embeddedice_send(arm_jtag_t *jtag_info, u32 *data, u32 size);
+extern int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout);
 
 #endif /* EMBEDDED_ICE_H */