MIPS: make fixed code arrays static const

[openocd] / src / target / etb.c

diff --git a/src/target/etb.c b/src/target/etb.c
index a789777baa64e8f6bce650f3e124b78746c7c160..2c4e3ebe90037e5c4330857fd3a34677057a6895 100644 (file)
--- a/src/target/etb.c
+++ b/src/target/etb.c
@@ -54,14 +54,13 @@ static int etb_set_instr(struct etb *etb, uint32_t new_instr)
        {
                struct scan_field field;
 
-               field.tap = tap;
                field.num_bits = tap->ir_length;
                field.out_value = calloc(DIV_ROUND_UP(field.num_bits, 8), 1);
                buf_set_u32(field.out_value, 0, field.num_bits, new_instr);
 
                field.in_value = NULL;
 
-               jtag_add_ir_scan(1, &field, jtag_get_end_state());
+               jtag_add_ir_scan(tap, &field, jtag_get_end_state());
 
                free(field.out_value);
        }
@@ -75,7 +74,6 @@ static int etb_scann(struct etb *etb, uint32_t new_scan_chain)
        {
                struct scan_field field;
 
-               field.tap = etb->tap;
                field.num_bits = 5;
                field.out_value = calloc(DIV_ROUND_UP(field.num_bits, 8), 1);
                buf_set_u32(field.out_value, 0, field.num_bits, new_scan_chain);
@@ -84,7 +82,7 @@ static int etb_scann(struct etb *etb, uint32_t new_scan_chain)
 
                /* select INTEST instruction */
                etb_set_instr(etb, 0x2);
-               jtag_add_dr_scan(1, &field, jtag_get_end_state());
+               jtag_add_dr_scan(etb->tap, 1, &field, jtag_get_end_state());
 
                etb->cur_scan_chain = new_scan_chain;
 
@@ -179,24 +177,21 @@ static int etb_read_ram(struct etb *etb, uint32_t *data, int num_frames)
        etb_scann(etb, 0x0);
        etb_set_instr(etb, 0xc);
 
-       fields[0].tap = etb->tap;
        fields[0].num_bits = 32;
        fields[0].out_value = NULL;
        fields[0].in_value = NULL;
 
-       fields[1].tap = etb->tap;
        fields[1].num_bits = 7;
        fields[1].out_value = malloc(1);
        buf_set_u32(fields[1].out_value, 0, 7, 4);
        fields[1].in_value = NULL;
 
-       fields[2].tap = etb->tap;
        fields[2].num_bits = 1;
        fields[2].out_value = malloc(1);
        buf_set_u32(fields[2].out_value, 0, 1, 0);
        fields[2].in_value = NULL;
 
-       jtag_add_dr_scan(3, fields, jtag_get_end_state());
+       jtag_add_dr_scan(etb->tap, 3, fields, jtag_get_end_state());
 
        for (i = 0; i < num_frames; i++)
        {
@@ -210,7 +205,7 @@ static int etb_read_ram(struct etb *etb, uint32_t *data, int num_frames)
                        buf_set_u32(fields[1].out_value, 0, 7, 0);
 
                fields[0].in_value = (uint8_t *)(data + i);
-               jtag_add_dr_scan(3, fields, jtag_get_end_state());
+               jtag_add_dr_scan(etb->tap, 3, fields, jtag_get_end_state());
 
                jtag_add_callback(etb_getbuf, (jtag_callback_data_t)(data + i));
        }
@@ -236,14 +231,12 @@ static int etb_read_reg_w_check(struct reg *reg,
        etb_scann(etb_reg->etb, 0x0);
        etb_set_instr(etb_reg->etb, 0xc);
 
-       fields[0].tap = etb_reg->etb->tap;
        fields[0].num_bits = 32;
        fields[0].out_value = reg->value;
        fields[0].in_value = NULL;
        fields[0].check_value = NULL;
        fields[0].check_mask = NULL;
 
-       fields[1].tap = etb_reg->etb->tap;
        fields[1].num_bits = 7;
        fields[1].out_value = malloc(1);
        buf_set_u32(fields[1].out_value, 0, 7, reg_addr);
@@ -251,7 +244,6 @@ static int etb_read_reg_w_check(struct reg *reg,
        fields[1].check_value = NULL;
        fields[1].check_mask = NULL;
 
-       fields[2].tap = etb_reg->etb->tap;
        fields[2].num_bits = 1;
        fields[2].out_value = malloc(1);
        buf_set_u32(fields[2].out_value, 0, 1, 0);
@@ -259,7 +251,7 @@ static int etb_read_reg_w_check(struct reg *reg,
        fields[2].check_value = NULL;
        fields[2].check_mask = NULL;
 
-       jtag_add_dr_scan(3, fields, jtag_get_end_state());
+       jtag_add_dr_scan(etb_reg->etb->tap, 3, fields, jtag_get_end_state());
 
        /* read the identification register in the second run, to make sure we
         * don't read the ETB data register twice, skipping every second entry
@@ -269,7 +261,7 @@ static int etb_read_reg_w_check(struct reg *reg,
        fields[0].check_value = check_value;
        fields[0].check_mask = check_mask;
 
-       jtag_add_dr_scan_check(3, fields, jtag_get_end_state());
+       jtag_add_dr_scan_check(etb_reg->etb->tap, 3, fields, jtag_get_end_state());
 
        free(fields[1].out_value);
        free(fields[2].out_value);
@@ -322,19 +314,16 @@ static int etb_write_reg(struct reg *reg, uint32_t value)
        etb_scann(etb_reg->etb, 0x0);
        etb_set_instr(etb_reg->etb, 0xc);
 
-       fields[0].tap = etb_reg->etb->tap;
        fields[0].num_bits = 32;
        fields[0].out_value = malloc(4);
        buf_set_u32(fields[0].out_value, 0, 32, value);
        fields[0].in_value = NULL;
 
-       fields[1].tap = etb_reg->etb->tap;
        fields[1].num_bits = 7;
        fields[1].out_value = malloc(1);
        buf_set_u32(fields[1].out_value, 0, 7, reg_addr);
        fields[1].in_value = NULL;
 
-       fields[2].tap = etb_reg->etb->tap;
        fields[2].num_bits = 1;
        fields[2].out_value = malloc(1);
        buf_set_u32(fields[2].out_value, 0, 1, 1);
@@ -447,17 +436,21 @@ COMMAND_HANDLER(handle_etb_trigger_percent_command)
 
 static const struct command_registration etb_config_command_handlers[] = {
        {
+               /* NOTE:  with ADIv5, ETBs are accessed using DAP operations,
+                * possibly over SWD, not through separate TAPs...
+                */
                .name = "config",
-               .handler = &handle_etb_config_command,
+               .handler = handle_etb_config_command,
                .mode = COMMAND_CONFIG,
+               .help = "Associate ETB with target and JTAG TAP.",
                .usage = "target tap",
        },
        {
                .name = "trigger_percent",
-               .handler = &handle_etb_trigger_percent_command,
+               .handler = handle_etb_trigger_percent_command,
                .mode = COMMAND_EXEC,
-               .help = "percent of trace buffer to be filled "
-                       "after the trigger occurs",
+               .help = "Set percent of trace buffer to be filled "
+                       "after the trigger occurs (2..100).",
                .usage = "[percent]",
        },
        COMMAND_REGISTRATION_DONE
@@ -579,9 +572,9 @@ static int etb_read_trace(struct etm_context *etm_ctx)
                free(etm_ctx->trace_data);
        }
 
-       if ((etm_ctx->portmode & ETM_PORT_WIDTH_MASK) == ETM_PORT_4BIT)
+       if ((etm_ctx->control & ETM_PORT_WIDTH_MASK) == ETM_PORT_4BIT)
                etm_ctx->trace_depth = num_frames * 3;
-       else if ((etm_ctx->portmode & ETM_PORT_WIDTH_MASK) == ETM_PORT_8BIT)
+       else if ((etm_ctx->control & ETM_PORT_WIDTH_MASK) == ETM_PORT_8BIT)
                etm_ctx->trace_depth = num_frames * 2;
        else
                etm_ctx->trace_depth = num_frames;
@@ -590,7 +583,7 @@ static int etb_read_trace(struct etm_context *etm_ctx)
 
        for (i = 0, j = 0; i < num_frames; i++)
        {
-               if ((etm_ctx->portmode & ETM_PORT_WIDTH_MASK) == ETM_PORT_4BIT)
+               if ((etm_ctx->control & ETM_PORT_WIDTH_MASK) == ETM_PORT_4BIT)
                {
                        /* trace word j */
                        etm_ctx->trace_data[j].pipestat = trace_data[i] & 0x7;
@@ -636,7 +629,7 @@ static int etb_read_trace(struct etm_context *etm_ctx)
 
                        j += 3;
                }
-               else if ((etm_ctx->portmode & ETM_PORT_WIDTH_MASK) == ETM_PORT_8BIT)
+               else if ((etm_ctx->control & ETM_PORT_WIDTH_MASK) == ETM_PORT_8BIT)
                {
                        /* trace word j */
                        etm_ctx->trace_data[j].pipestat = trace_data[i] & 0x7;
@@ -699,9 +692,9 @@ static int etb_start_capture(struct etm_context *etm_ctx)
        uint32_t etb_ctrl_value = 0x1;
        uint32_t trigger_count;
 
-       if ((etm_ctx->portmode & ETM_PORT_MODE_MASK) == ETM_PORT_DEMUXED)
+       if ((etm_ctx->control & ETM_PORT_MODE_MASK) == ETM_PORT_DEMUXED)
        {
-               if ((etm_ctx->portmode & ETM_PORT_WIDTH_MASK) != ETM_PORT_8BIT)
+               if ((etm_ctx->control & ETM_PORT_WIDTH_MASK) != ETM_PORT_8BIT)
                {
                        LOG_ERROR("ETB can't run in demultiplexed mode with a 4 or 16 bit port");
                        return ERROR_ETM_PORTMODE_NOT_SUPPORTED;
@@ -709,7 +702,7 @@ static int etb_start_capture(struct etm_context *etm_ctx)
                etb_ctrl_value |= 0x2;
        }
 
-       if ((etm_ctx->portmode & ETM_PORT_MODE_MASK) == ETM_PORT_MUXED) {
+       if ((etm_ctx->control & ETM_PORT_MODE_MASK) == ETM_PORT_MUXED) {
                LOG_ERROR("ETB: can't run in multiplexed mode");
                return ERROR_ETM_PORTMODE_NOT_SUPPORTED;
        }