static int etb_set_instr(etb_t *etb, u32 new_instr)
{
jtag_tap_t *tap;
+
tap = etb->tap;
if (tap==NULL)
return ERROR_FAIL;
field.in_value = NULL;
-
- field.in_handler = NULL;
-
-
jtag_add_ir_scan(1, &field, TAP_INVALID);
free(field.out_value);
static int etb_scann(etb_t *etb, u32 new_scan_chain)
{
- if(etb->cur_scan_chain != new_scan_chain)
+ if (etb->cur_scan_chain != new_scan_chain)
{
scan_field_t field;
field.in_value = NULL;
-
- field.in_handler = NULL;
-
-
/* select INTEST instruction */
etb_set_instr(etb, 0x2);
jtag_add_dr_scan(1, &field, TAP_INVALID);
static int etb_get_reg(reg_t *reg)
{
int retval;
+
if ((retval = etb_read_reg(reg)) != ERROR_OK)
{
LOG_ERROR("BUG: error scheduling etm register read");
fields[0].out_value = NULL;
u8 tmp[4];
fields[0].in_value = tmp;
- fields[0].in_handler = NULL;
fields[1].tap = etb->tap;
fields[1].num_bits = 7;
fields[1].out_value = malloc(1);
buf_set_u32(fields[1].out_value, 0, 7, 4);
fields[1].in_value = NULL;
- fields[1].in_handler = NULL;
fields[2].tap = etb->tap;
fields[2].num_bits = 1;
fields[2].out_value = malloc(1);
buf_set_u32(fields[2].out_value, 0, 1, 0);
fields[2].in_value = NULL;
- fields[2].in_handler = NULL;
jtag_add_dr_scan(3, fields, TAP_INVALID);
-
for (i = 0; i < num_frames; i++)
{
/* ensure nR/W reamins set to read */
fields[0].tap = etb_reg->etb->tap;
fields[0].num_bits = 32;
fields[0].out_value = reg->value;
-
fields[0].in_value = NULL;
-
- fields[0].in_handler = NULL;
-
-
fields[1].tap = etb_reg->etb->tap;
fields[1].num_bits = 7;
fields[1].out_value = malloc(1);
buf_set_u32(fields[1].out_value, 0, 7, reg_addr);
-
fields[1].in_value = NULL;
-
- fields[1].in_handler = NULL;
-
-
fields[2].tap = etb_reg->etb->tap;
fields[2].num_bits = 1;
fields[2].out_value = malloc(1);
buf_set_u32(fields[2].out_value, 0, 1, 0);
-
fields[2].in_value = NULL;
-
- fields[2].in_handler = NULL;
-
-
jtag_add_dr_scan(3, fields, TAP_INVALID);
/* read the identification register in the second run, to make sure we
buf_set_u32(fields[1].out_value, 0, 7, 0x0);
fields[0].in_value = reg->value;
- jtag_set_check_value(fields+0, check_value, check_mask, NULL);
-
jtag_add_dr_scan(3, fields, TAP_INVALID);
+ jtag_check_value_mask(fields+0, check_value, check_mask);
+
free(fields[1].out_value);
free(fields[2].out_value);
int etb_set_reg(reg_t *reg, u32 value)
{
int retval;
+
if ((retval = etb_write_reg(reg, value)) != ERROR_OK)
{
LOG_ERROR("BUG: error scheduling etm register write");
int etb_set_reg_w_exec(reg_t *reg, u8 *buf)
{
int retval;
+
etb_set_reg(reg, buf_get_u32(buf, 0, reg->size));
if ((retval = jtag_execute_queue()) != ERROR_OK)
fields[0].num_bits = 32;
fields[0].out_value = malloc(4);
buf_set_u32(fields[0].out_value, 0, 32, value);
-
fields[0].in_value = NULL;
-
- fields[0].in_handler = NULL;
-
-
fields[1].tap = etb_reg->etb->tap;
fields[1].num_bits = 7;
fields[1].out_value = malloc(1);
buf_set_u32(fields[1].out_value, 0, 7, reg_addr);
-
fields[1].in_value = NULL;
-
- fields[1].in_handler = NULL;
-
-
fields[2].tap = etb_reg->etb->tap;
fields[2].num_bits = 1;
fields[2].out_value = malloc(1);
fields[2].in_value = NULL;
-
- fields[2].in_handler = NULL;
-
-
- jtag_add_dr_scan(3, fields, TAP_INVALID);
-
free(fields[0].out_value);
free(fields[1].out_value);
free(fields[2].out_value);
}
tap = jtag_TapByString( args[1] );
- if( tap == NULL ){
+ if (tap == NULL)
+ {
command_print(cmd_ctx, "Tap: %s does not exist", args[1] );
return ERROR_FAIL;
}
-
if (arm7_9->etm_ctx)
{
etb_t *etb = malloc(sizeof(etb_t));