Cortex-M3: improved core exception handling

[openocd] / src / target / feroceon.c

diff --git a/src/target/feroceon.c b/src/target/feroceon.c
index c029e44e69e088b2728d923e3c31e31ee841c6bd..19ed0cd50d80f135da63390e64d93a52bb9573dc 100644 (file)
--- a/src/target/feroceon.c
+++ b/src/target/feroceon.c
@@ -55,6 +55,9 @@
 #include "arm926ejs.h"
 #include "arm966e.h"
 #include "target_type.h"
+#include "register.h"
+#include "arm_opcodes.h"
+
 
 int feroceon_assert_reset(struct target *target)
 {
@@ -453,7 +456,7 @@ int feroceon_bulk_write_memory(struct target *target, uint32_t address, uint32_t
        int retval;
        struct arm *armv4_5 = target->arch_info;
        struct arm7_9_common *arm7_9 = armv4_5->arch_info;
-       enum armv4_5_state core_state = armv4_5->core_state;
+       enum arm_state core_state = armv4_5->core_state;
        uint32_t x, flip, shift, save[7];
        uint32_t i;
 
@@ -522,7 +525,7 @@ int feroceon_bulk_write_memory(struct target *target, uint32_t address, uint32_t
        buf_set_u32(armv4_5->core_cache->reg_list[0].value, 0, 32, address);
        armv4_5->core_cache->reg_list[0].valid = 1;
        armv4_5->core_cache->reg_list[0].dirty = 1;
-       armv4_5->core_state = ARMV4_5_STATE_ARM;
+       armv4_5->core_state = ARM_STATE_ARM;
 
        embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_COMMS_DATA], 0);
        arm7_9_resume(target, 0, arm7_9->dcc_working_area->address, 1, 1);
@@ -691,13 +694,14 @@ struct target_type feroceon_target =
        .deassert_reset = arm7_9_deassert_reset,
        .soft_reset_halt = arm926ejs_soft_reset_halt,
 
-       .get_gdb_reg_list = armv4_5_get_gdb_reg_list,
+       .get_gdb_reg_list = arm_get_gdb_reg_list,
 
        .read_memory = arm7_9_read_memory,
        .write_memory = arm926ejs_write_memory,
        .bulk_write_memory = feroceon_bulk_write_memory,
-       .checksum_memory = arm7_9_checksum_memory,
-       .blank_check_memory = arm7_9_blank_check_memory,
+
+       .checksum_memory = arm_checksum_memory,
+       .blank_check_memory = arm_blank_check_memory,
 
        .run_algorithm = armv4_5_run_algorithm,
 
@@ -706,7 +710,7 @@ struct target_type feroceon_target =
        .add_watchpoint = arm7_9_add_watchpoint,
        .remove_watchpoint = arm7_9_remove_watchpoint,
 
-       .register_commands = arm926ejs_register_commands,
+       .commands = arm926ejs_command_handlers,
        .target_create = feroceon_target_create,
        .init_target = feroceon_init_target,
        .examine = feroceon_examine,
@@ -717,7 +721,7 @@ struct target_type dragonite_target =
        .name = "dragonite",
 
        .poll = arm7_9_poll,
-       .arch_state = armv4_5_arch_state,
+       .arch_state = arm_arch_state,
 
        .target_request_data = arm7_9_target_request_data,
 
@@ -729,13 +733,14 @@ struct target_type dragonite_target =
        .deassert_reset = arm7_9_deassert_reset,
        .soft_reset_halt = arm7_9_soft_reset_halt,
 
-       .get_gdb_reg_list = armv4_5_get_gdb_reg_list,
+       .get_gdb_reg_list = arm_get_gdb_reg_list,
 
        .read_memory = arm7_9_read_memory,
        .write_memory = arm7_9_write_memory,
        .bulk_write_memory = feroceon_bulk_write_memory,
-       .checksum_memory = arm7_9_checksum_memory,
-       .blank_check_memory = arm7_9_blank_check_memory,
+
+       .checksum_memory = arm_checksum_memory,
+       .blank_check_memory = arm_blank_check_memory,
 
        .run_algorithm = armv4_5_run_algorithm,
 
@@ -744,7 +749,7 @@ struct target_type dragonite_target =
        .add_watchpoint = arm7_9_add_watchpoint,
        .remove_watchpoint = arm7_9_remove_watchpoint,
 
-       .register_commands = arm966e_register_commands,
+       .commands = arm966e_command_handlers,
        .target_create = dragonite_target_create,
        .init_target = feroceon_init_target,
        .examine = feroceon_examine,