]> git.sur5r.net Git - openocd/blobdiff - src/target/hla_target.c
armv7m: use generic arm read/write_core_reg
[openocd] / src / target / hla_target.c
index 11926c78dd138291b10c093ead5bb9168d0cb426..e1e6815f7270a9efc080b29030004fada6cb5627 100644 (file)
@@ -47,7 +47,6 @@ static inline struct hl_interface_s *target_to_adapter(struct target *target)
 }
 
 static int adapter_load_core_reg_u32(struct target *target,
-               enum armv7m_regtype type,
                uint32_t num, uint32_t *value)
 {
        int retval;
@@ -144,7 +143,6 @@ static int adapter_load_core_reg_u32(struct target *target,
 }
 
 static int adapter_store_core_reg_u32(struct target *target,
-               enum armv7m_regtype type,
                uint32_t num, uint32_t value)
 {
        int retval;
@@ -178,7 +176,7 @@ static int adapter_store_core_reg_u32(struct target *target,
                        struct reg *r;
 
                        LOG_ERROR("JTAG failure");
-                       r = armv7m->core_cache->reg_list + num;
+                       r = armv7m->arm.core_cache->reg_list + num;
                        r->dirty = r->valid;
                        return ERROR_JTAG_DEVICE_ERROR;
                }
@@ -313,11 +311,13 @@ static int adapter_target_create(struct target *target,
 static int adapter_load_context(struct target *target)
 {
        struct armv7m_common *armv7m = target_to_armv7m(target);
-       int num_regs = armv7m->core_cache->num_regs;
+       int num_regs = armv7m->arm.core_cache->num_regs;
 
        for (int i = 0; i < num_regs; i++) {
-               if (!armv7m->core_cache->reg_list[i].valid)
-                       armv7m->read_core_reg(target, i);
+
+               struct reg *r = &armv7m->arm.core_cache->reg_list[i];
+               if (!r->valid)
+                       armv7m->arm.read_core_reg(target, r, i, ARM_MODE_ANY);
        }
 
        return ERROR_OK;
@@ -341,7 +341,7 @@ static int adapter_debug_entry(struct target *target)
        /* make sure we clear the vector catch bit */
        adapter->layout->api->write_debug_reg(adapter->fd, DCB_DEMCR, TRCENA);
 
-       r = armv7m->core_cache->reg_list + ARMV7M_xPSR;
+       r = arm->core_cache->reg_list + ARMV7M_xPSR;
        xPSR = buf_get_u32(r->value, 0, 32);
 
        /* Are we in an exception handler */
@@ -460,7 +460,7 @@ static int adapter_assert_reset(struct target *target)
                return res;
 
        /* registers are now invalid */
-       register_cache_invalidate(armv7m->core_cache);
+       register_cache_invalidate(armv7m->arm.core_cache);
 
        if (target->reset_halt) {
                target->state = TARGET_RESET;
@@ -577,7 +577,7 @@ static int adapter_resume(struct target *target, int current,
        armv7m_restore_context(target);
 
        /* registers are now invalid */
-       register_cache_invalidate(armv7m->core_cache);
+       register_cache_invalidate(armv7m->arm.core_cache);
 
        /* the front-end may request us not to handle breakpoints */
        if (handle_breakpoints) {
@@ -657,7 +657,7 @@ static int adapter_step(struct target *target, int current,
                return res;
 
        /* registers are now invalid */
-       register_cache_invalidate(armv7m->core_cache);
+       register_cache_invalidate(armv7m->arm.core_cache);
 
        if (breakpoint)
                cortex_m3_set_breakpoint(target, breakpoint);