cortex_m3: use register_commands()

[openocd] / src / target / mips32.c

diff --git a/src/target/mips32.c b/src/target/mips32.c
index c9ef1380efd06de078527ce2590a83105b622486..0b8ebb4a1fd2b768abd9805781f3057e6d06579d 100644 (file)
--- a/src/target/mips32.c
+++ b/src/target/mips32.c
@@ -27,6 +27,7 @@
 #endif
 
 #include "mips32.h"
+#include "register.h"
 
 
 char* mips32_core_reg_list[] =
@@ -90,16 +91,19 @@ uint8_t mips32_gdb_dummy_fp_value[] = {0, 0, 0, 0};
 
 struct reg mips32_gdb_dummy_fp_reg =
 {
-       "GDB dummy floating-point register", mips32_gdb_dummy_fp_value, 0, 1, 32, NULL, 0, NULL, 0
+       .name = "GDB dummy floating-point register",
+       .value = mips32_gdb_dummy_fp_value,
+       .dirty = 0,
+       .valid = 1,
+       .size = 32,
+       .arch_info = NULL,
 };
 
-int mips32_core_reg_arch_type = -1;
-
 int mips32_get_core_reg(struct reg *reg)
 {
        int retval;
        struct mips32_core_reg *mips32_reg = reg->arch_info;
-       target_t *target = mips32_reg->target;
+       struct target *target = mips32_reg->target;
        struct mips32_common *mips32_target = target->arch_info;
 
        if (target->state != TARGET_HALTED)
@@ -115,7 +119,7 @@ int mips32_get_core_reg(struct reg *reg)
 int mips32_set_core_reg(struct reg *reg, uint8_t *buf)
 {
        struct mips32_core_reg *mips32_reg = reg->arch_info;
-       target_t *target = mips32_reg->target;
+       struct target *target = mips32_reg->target;
        uint32_t value = buf_get_u32(buf, 0, 32);
 
        if (target->state != TARGET_HALTED)
@@ -130,7 +134,7 @@ int mips32_set_core_reg(struct reg *reg, uint8_t *buf)
        return ERROR_OK;
 }
 
-int mips32_read_core_reg(struct target_s *target, int num)
+int mips32_read_core_reg(struct target *target, int num)
 {
        uint32_t reg_value;
        struct mips32_core_reg *mips_core_reg;
@@ -150,7 +154,7 @@ int mips32_read_core_reg(struct target_s *target, int num)
        return ERROR_OK;
 }
 
-int mips32_write_core_reg(struct target_s *target, int num)
+int mips32_write_core_reg(struct target *target, int num)
 {
        uint32_t reg_value;
        struct mips32_core_reg *mips_core_reg;
@@ -171,22 +175,7 @@ int mips32_write_core_reg(struct target_s *target, int num)
        return ERROR_OK;
 }
 
-int mips32_invalidate_core_regs(target_t *target)
-{
-       /* get pointers to arch-specific information */
-       struct mips32_common *mips32 = target->arch_info;
-       int i;
-
-       for (i = 0; i < mips32->core_cache->num_regs; i++)
-       {
-               mips32->core_cache->reg_list[i].valid = 0;
-               mips32->core_cache->reg_list[i].dirty = 0;
-       }
-
-       return ERROR_OK;
-}
-
-int mips32_get_gdb_reg_list(target_t *target, struct reg **reg_list[], int *reg_list_size)
+int mips32_get_gdb_reg_list(struct target *target, struct reg **reg_list[], int *reg_list_size)
 {
        /* get pointers to arch-specific information */
        struct mips32_common *mips32 = target->arch_info;
@@ -210,7 +199,7 @@ int mips32_get_gdb_reg_list(target_t *target, struct reg **reg_list[], int *reg_
        return ERROR_OK;
 }
 
-int mips32_save_context(target_t *target)
+int mips32_save_context(struct target *target)
 {
        int i;
 
@@ -232,7 +221,7 @@ int mips32_save_context(target_t *target)
        return ERROR_OK;
 }
 
-int mips32_restore_context(target_t *target)
+int mips32_restore_context(struct target *target)
 {
        int i;
 
@@ -254,14 +243,14 @@ int mips32_restore_context(target_t *target)
        return ERROR_OK;
 }
 
-int mips32_arch_state(struct target_s *target)
+int mips32_arch_state(struct target *target)
 {
        struct mips32_common *mips32 = target->arch_info;
 
        if (mips32->common_magic != MIPS32_COMMON_MAGIC)
        {
                LOG_ERROR("BUG: called for a non-MIPS32 target");
-               exit(-1);
+               return ERROR_FAIL;
        }
 
        LOG_USER("target halted due to %s, pc: 0x%8.8" PRIx32 "",
@@ -271,7 +260,12 @@ int mips32_arch_state(struct target_s *target)
        return ERROR_OK;
 }
 
-struct reg_cache *mips32_build_reg_cache(target_t *target)
+static const struct reg_arch_type mips32_reg_type = {
+       .get = mips32_get_core_reg,
+       .set = mips32_set_core_reg,
+};
+
+struct reg_cache *mips32_build_reg_cache(struct target *target)
 {
        /* get pointers to arch-specific information */
        struct mips32_common *mips32 = target->arch_info;
@@ -283,9 +277,6 @@ struct reg_cache *mips32_build_reg_cache(target_t *target)
        struct mips32_core_reg *arch_info = malloc(sizeof(struct mips32_core_reg) * num_regs);
        int i;
 
-       if (mips32_core_reg_arch_type == -1)
-               mips32_core_reg_arch_type = register_reg_arch_type(mips32_get_core_reg, mips32_set_core_reg);
-
        register_init_dummy(&mips32_gdb_dummy_fp_reg);
 
        /* Build the process context cache */
@@ -306,16 +297,14 @@ struct reg_cache *mips32_build_reg_cache(target_t *target)
                reg_list[i].value = calloc(1, 4);
                reg_list[i].dirty = 0;
                reg_list[i].valid = 0;
-               reg_list[i].bitfield_desc = NULL;
-               reg_list[i].num_bitfields = 0;
-               reg_list[i].arch_type = mips32_core_reg_arch_type;
+               reg_list[i].type = &mips32_reg_type;
                reg_list[i].arch_info = &arch_info[i];
        }
 
        return cache;
 }
 
-int mips32_init_arch_info(target_t *target, struct mips32_common *mips32, struct jtag_tap *tap)
+int mips32_init_arch_info(struct target *target, struct mips32_common *mips32, struct jtag_tap *tap)
 {
        target->arch_info = mips32;
        mips32->common_magic = MIPS32_COMMON_MAGIC;
@@ -331,18 +320,18 @@ int mips32_init_arch_info(target_t *target, struct mips32_common *mips32, struct
        return ERROR_OK;
 }
 
-int mips32_register_commands(struct command_context_s *cmd_ctx)
+int mips32_register_commands(struct command_context *cmd_ctx)
 {
        return ERROR_OK;
 }
 
-int mips32_run_algorithm(struct target_s *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_params, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info)
+int mips32_run_algorithm(struct target *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_params, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info)
 {
        /*TODO*/
        return ERROR_OK;
 }
 
-int mips32_examine(struct target_s *target)
+int mips32_examine(struct target *target)
 {
        struct mips32_common *mips32 = target->arch_info;
 
@@ -361,7 +350,7 @@ int mips32_examine(struct target_s *target)
        return ERROR_OK;
 }
 
-int mips32_configure_break_unit(struct target_s *target)
+int mips32_configure_break_unit(struct target *target)
 {
        /* get pointers to arch-specific information */
        struct mips32_common *mips32 = target->arch_info;
@@ -421,7 +410,7 @@ int mips32_configure_break_unit(struct target_s *target)
        return ERROR_OK;
 }
 
-int mips32_enable_interrupts(struct target_s *target, int enable)
+int mips32_enable_interrupts(struct target *target, int enable)
 {
        int retval;
        int update = 0;