}
/* refresh core register cache */
- for (unsigned i = 0; i < MIPS32NUMCOREREGS; i++)
+ for (i = 0; i < MIPS32NUMCOREREGS; i++)
{
if (!mips32->core_cache->reg_list[i].valid)
mips32->read_core_reg(target, i);
}
}
- for (int i = 0; i < num_reg_params; i++)
+ for (i = 0; i < num_reg_params; i++)
{
struct reg *reg = register_get_by_name(mips32->core_cache, reg_params[i].reg_name, 0);
init_reg_param(®_params[1], "a1", 32, PARAM_OUT);
buf_set_u32(reg_params[1].value, 0, 32, count);
+ int timeout = 20000 * (1 + (count / (1024 * 1024)));
+
if ((retval = target_run_algorithm(target, 0, NULL, 2, reg_params,
- crc_algorithm->address, crc_algorithm->address + (sizeof(mips_crc_code)-4), 10000,
+ crc_algorithm->address, crc_algorithm->address + (sizeof(mips_crc_code)-4), timeout,
&mips32_info)) != ERROR_OK)
{
destroy_reg_param(®_params[0]);