* displaying/modifying memory and memory mapped registers.
*/
-static int ejtag_dma_read(mips_ejtag_t *ejtag_info, uint32_t addr, uint32_t *data)
+static int ejtag_dma_read(struct mips_ejtag *ejtag_info, uint32_t addr, uint32_t *data)
{
uint32_t v;
uint32_t ejtag_ctrl;
/* Setup Address */
v = addr;
- mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS, NULL);
+ mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
mips_ejtag_drscan_32(ejtag_info, &v);
/* Initiate DMA Read & set DSTRT */
- mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+ mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
ejtag_ctrl = EJTAG_CTRL_DMAACC | EJTAG_CTRL_DRWN | EJTAG_CTRL_DMA_WORD | EJTAG_CTRL_DSTRT | ejtag_info->ejtag_ctrl;
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
do {
ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
- } while(ejtag_ctrl & EJTAG_CTRL_DSTRT);
+ } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
/* Read Data */
- mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA, NULL);
+ mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
mips_ejtag_drscan_32(ejtag_info, data);
/* Clear DMA & Check DERR */
- mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+ mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
ejtag_ctrl = ejtag_info->ejtag_ctrl;
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
if (ejtag_ctrl & EJTAG_CTRL_DERR)
{
if (retries--) {
- LOG_ERROR("DMA Read Addr = %08x Data = ERROR ON READ (retrying)\n", addr);
+ LOG_ERROR("DMA Read Addr = %08" PRIx32 " Data = ERROR ON READ (retrying)\n", addr);
goto begin_ejtag_dma_read;
}
else
- LOG_ERROR("DMA Read Addr = %08x Data = ERROR ON READ\n", addr);
+ LOG_ERROR("DMA Read Addr = %08" PRIx32 " Data = ERROR ON READ\n", addr);
return ERROR_JTAG_DEVICE_ERROR;
}
return ERROR_OK;
}
-static int ejtag_dma_read_h(mips_ejtag_t *ejtag_info, uint32_t addr, uint16_t *data)
+static int ejtag_dma_read_h(struct mips_ejtag *ejtag_info, uint32_t addr, uint16_t *data)
{
uint32_t v;
uint32_t ejtag_ctrl;
/* Setup Address */
v = addr;
- mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS, NULL);
+ mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
mips_ejtag_drscan_32(ejtag_info, &v);
/* Initiate DMA Read & set DSTRT */
- mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+ mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
ejtag_ctrl = EJTAG_CTRL_DMAACC | EJTAG_CTRL_DRWN | EJTAG_CTRL_DMA_HALFWORD | EJTAG_CTRL_DSTRT | ejtag_info->ejtag_ctrl;
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
do {
ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
- } while(ejtag_ctrl & EJTAG_CTRL_DSTRT);
+ } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
/* Read Data */
- mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA, NULL);
+ mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
mips_ejtag_drscan_32(ejtag_info, &v);
/* Clear DMA & Check DERR */
- mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+ mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
ejtag_ctrl = ejtag_info->ejtag_ctrl;
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
if (ejtag_ctrl & EJTAG_CTRL_DERR)
{
if (retries--) {
- LOG_ERROR("DMA Read Addr = %08x Data = ERROR ON READ (retrying)\n", addr);
+ LOG_ERROR("DMA Read Addr = %08" PRIx32 " Data = ERROR ON READ (retrying)\n", addr);
goto begin_ejtag_dma_read_h;
}
else
- LOG_ERROR("DMA Read Addr = %08x Data = ERROR ON READ\n", addr);
+ LOG_ERROR("DMA Read Addr = %08" PRIx32 " Data = ERROR ON READ\n", addr);
return ERROR_JTAG_DEVICE_ERROR;
}
return ERROR_OK;
}
-static int ejtag_dma_read_b(mips_ejtag_t *ejtag_info, uint32_t addr, uint8_t *data)
+static int ejtag_dma_read_b(struct mips_ejtag *ejtag_info, uint32_t addr, uint8_t *data)
{
uint32_t v;
uint32_t ejtag_ctrl;
/* Setup Address */
v = addr;
- mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS, NULL);
+ mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
mips_ejtag_drscan_32(ejtag_info, &v);
/* Initiate DMA Read & set DSTRT */
- mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+ mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
ejtag_ctrl = EJTAG_CTRL_DMAACC | EJTAG_CTRL_DRWN | EJTAG_CTRL_DMA_BYTE | EJTAG_CTRL_DSTRT | ejtag_info->ejtag_ctrl;
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
do {
ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
- } while(ejtag_ctrl & EJTAG_CTRL_DSTRT);
+ } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
/* Read Data */
- mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA, NULL);
+ mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
mips_ejtag_drscan_32(ejtag_info, &v);
/* Clear DMA & Check DERR */
- mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+ mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
ejtag_ctrl = ejtag_info->ejtag_ctrl;
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
if (ejtag_ctrl & EJTAG_CTRL_DERR)
{
if (retries--) {
- LOG_ERROR("DMA Read Addr = %08x Data = ERROR ON READ (retrying)\n", addr);
+ LOG_ERROR("DMA Read Addr = %08" PRIx32 " Data = ERROR ON READ (retrying)\n", addr);
goto begin_ejtag_dma_read_b;
}
else
- LOG_ERROR("DMA Read Addr = %08x Data = ERROR ON READ\n", addr);
+ LOG_ERROR("DMA Read Addr = %08" PRIx32 " Data = ERROR ON READ\n", addr);
return ERROR_JTAG_DEVICE_ERROR;
}
case 2:
*data = (v >> 16) & 0xff;
break;
- case 3:
+ case 3:
*data = (v >> 24) & 0xff;
break;
}
return ERROR_OK;
}
-static int ejtag_dma_write(mips_ejtag_t *ejtag_info, uint32_t addr, uint32_t data)
+static int ejtag_dma_write(struct mips_ejtag *ejtag_info, uint32_t addr, uint32_t data)
{
uint32_t v;
uint32_t ejtag_ctrl;
/* Setup Address */
v = addr;
- mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS, NULL);
+ mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
mips_ejtag_drscan_32(ejtag_info, &v);
/* Setup Data */
v = data;
- mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA, NULL);
+ mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
mips_ejtag_drscan_32(ejtag_info, &v);
/* Initiate DMA Write & set DSTRT */
- mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+ mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
ejtag_ctrl = EJTAG_CTRL_DMAACC | EJTAG_CTRL_DMA_WORD | EJTAG_CTRL_DSTRT | ejtag_info->ejtag_ctrl;
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
do {
ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
- } while(ejtag_ctrl & EJTAG_CTRL_DSTRT);
+ } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
/* Clear DMA & Check DERR */
- mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+ mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
ejtag_ctrl = ejtag_info->ejtag_ctrl;
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
if (ejtag_ctrl & EJTAG_CTRL_DERR)
{
if (retries--) {
- LOG_ERROR("DMA Write Addr = %08x Data = ERROR ON WRITE (retrying)\n", addr);
+ LOG_ERROR("DMA Write Addr = %08" PRIx32 " Data = ERROR ON WRITE (retrying)\n", addr);
goto begin_ejtag_dma_write;
}
else
- LOG_ERROR("DMA Write Addr = %08x Data = ERROR ON WRITE\n", addr);
+ LOG_ERROR("DMA Write Addr = %08" PRIx32 " Data = ERROR ON WRITE\n", addr);
return ERROR_JTAG_DEVICE_ERROR;
}
return ERROR_OK;
}
-static int ejtag_dma_write_h(mips_ejtag_t *ejtag_info, uint32_t addr, uint32_t data)
+static int ejtag_dma_write_h(struct mips_ejtag *ejtag_info, uint32_t addr, uint32_t data)
{
uint32_t v;
uint32_t ejtag_ctrl;
/* Setup Address */
v = addr;
- mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS, NULL);
+ mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
mips_ejtag_drscan_32(ejtag_info, &v);
/* Setup Data */
v = data;
- mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA, NULL);
+ mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
mips_ejtag_drscan_32(ejtag_info, &v);
/* Initiate DMA Write & set DSTRT */
- mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+ mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
ejtag_ctrl = EJTAG_CTRL_DMAACC | EJTAG_CTRL_DMA_HALFWORD | EJTAG_CTRL_DSTRT | ejtag_info->ejtag_ctrl;
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
do {
ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
- } while(ejtag_ctrl & EJTAG_CTRL_DSTRT);
+ } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
/* Clear DMA & Check DERR */
- mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+ mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
ejtag_ctrl = ejtag_info->ejtag_ctrl;
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
if (ejtag_ctrl & EJTAG_CTRL_DERR)
{
if (retries--) {
- LOG_ERROR("DMA Write Addr = %08x Data = ERROR ON WRITE (retrying)\n", addr);
+ LOG_ERROR("DMA Write Addr = %08" PRIx32 " Data = ERROR ON WRITE (retrying)\n", addr);
goto begin_ejtag_dma_write_h;
}
else
- LOG_ERROR("DMA Write Addr = %08x Data = ERROR ON WRITE\n", addr);
+ LOG_ERROR("DMA Write Addr = %08" PRIx32 " Data = ERROR ON WRITE\n", addr);
return ERROR_JTAG_DEVICE_ERROR;
}
return ERROR_OK;
}
-static int ejtag_dma_write_b(mips_ejtag_t *ejtag_info, uint32_t addr, uint32_t data)
+static int ejtag_dma_write_b(struct mips_ejtag *ejtag_info, uint32_t addr, uint32_t data)
{
uint32_t v;
uint32_t ejtag_ctrl;
/* Setup Address*/
v = addr;
- mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS, NULL);
+ mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
mips_ejtag_drscan_32(ejtag_info, &v);
/* Setup Data */
v = data;
- mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA, NULL);
+ mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
mips_ejtag_drscan_32(ejtag_info, &v);
/* Initiate DMA Write & set DSTRT */
- mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+ mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
ejtag_ctrl = EJTAG_CTRL_DMAACC | EJTAG_CTRL_DMA_BYTE | EJTAG_CTRL_DSTRT | ejtag_info->ejtag_ctrl;
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
do {
ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
- } while(ejtag_ctrl & EJTAG_CTRL_DSTRT);
+ } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
/* Clear DMA & Check DERR */
- mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+ mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
ejtag_ctrl = ejtag_info->ejtag_ctrl;
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
if (ejtag_ctrl & EJTAG_CTRL_DERR)
{
if (retries--) {
- LOG_ERROR("DMA Write Addr = %08x Data = ERROR ON WRITE (retrying)\n", addr);
+ LOG_ERROR("DMA Write Addr = %08" PRIx32 " Data = ERROR ON WRITE (retrying)\n", addr);
goto begin_ejtag_dma_write_b;
}
else
- LOG_ERROR("DMA Write Addr = %08x Data = ERROR ON WRITE\n", addr);
+ LOG_ERROR("DMA Write Addr = %08" PRIx32 " Data = ERROR ON WRITE\n", addr);
return ERROR_JTAG_DEVICE_ERROR;
}
return ERROR_OK;
}
-int mips32_dmaacc_read_mem(mips_ejtag_t *ejtag_info, uint32_t addr, int size, int count, void *buf)
+int mips32_dmaacc_read_mem(struct mips_ejtag *ejtag_info, uint32_t addr, int size, int count, void *buf)
{
switch (size)
{
return ERROR_OK;
}
-int mips32_dmaacc_read_mem32(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint32_t *buf)
+int mips32_dmaacc_read_mem32(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint32_t *buf)
{
int i;
int retval;
- for (i=0; i<count; i++) {
- if ((retval = ejtag_dma_read(ejtag_info, addr+i*sizeof(*buf), &buf[i])) != ERROR_OK)
+ for (i = 0; i < count; i++) {
+ if ((retval = ejtag_dma_read(ejtag_info, addr + i*sizeof(*buf), &buf[i])) != ERROR_OK)
return retval;
}
return ERROR_OK;
}
-int mips32_dmaacc_read_mem16(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint16_t *buf)
+int mips32_dmaacc_read_mem16(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint16_t *buf)
{
int i;
int retval;
- for (i=0; i<count; i++) {
- if ((retval = ejtag_dma_read_h(ejtag_info, addr+i*sizeof(*buf), &buf[i])) != ERROR_OK)
+ for (i = 0; i < count; i++) {
+ if ((retval = ejtag_dma_read_h(ejtag_info, addr + i*sizeof(*buf), &buf[i])) != ERROR_OK)
return retval;
}
return ERROR_OK;
}
-int mips32_dmaacc_read_mem8(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint8_t *buf)
+int mips32_dmaacc_read_mem8(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint8_t *buf)
{
int i;
int retval;
- for (i=0; i<count; i++) {
- if ((retval = ejtag_dma_read_b(ejtag_info, addr+i*sizeof(*buf), &buf[i])) != ERROR_OK)
+ for (i = 0; i < count; i++) {
+ if ((retval = ejtag_dma_read_b(ejtag_info, addr + i*sizeof(*buf), &buf[i])) != ERROR_OK)
return retval;
}
return ERROR_OK;
}
-int mips32_dmaacc_write_mem(mips_ejtag_t *ejtag_info, uint32_t addr, int size, int count, void *buf)
+int mips32_dmaacc_write_mem(struct mips_ejtag *ejtag_info, uint32_t addr, int size, int count, void *buf)
{
switch (size)
{
return ERROR_OK;
}
-int mips32_dmaacc_write_mem32(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint32_t *buf)
+int mips32_dmaacc_write_mem32(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint32_t *buf)
{
int i;
int retval;
- for (i=0; i<count; i++) {
- if ((retval = ejtag_dma_write(ejtag_info, addr+i*sizeof(*buf), buf[i])) != ERROR_OK)
+ for (i = 0; i < count; i++) {
+ if ((retval = ejtag_dma_write(ejtag_info, addr + i*sizeof(*buf), buf[i])) != ERROR_OK)
return retval;
}
return ERROR_OK;
}
-int mips32_dmaacc_write_mem16(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint16_t *buf)
+int mips32_dmaacc_write_mem16(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint16_t *buf)
{
int i;
int retval;
- for (i=0; i<count; i++) {
- if ((retval = ejtag_dma_write_h(ejtag_info, addr+i*sizeof(*buf), buf[i])) != ERROR_OK)
+ for (i = 0; i < count; i++) {
+ if ((retval = ejtag_dma_write_h(ejtag_info, addr + i*sizeof(*buf), buf[i])) != ERROR_OK)
return retval;
}
return ERROR_OK;
}
-int mips32_dmaacc_write_mem8(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint8_t *buf)
+int mips32_dmaacc_write_mem8(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint8_t *buf)
{
int i;
int retval;
- for (i=0; i<count; i++) {
- if ((retval = ejtag_dma_write_b(ejtag_info, addr+i*sizeof(*buf), buf[i])) != ERROR_OK)
+ for (i = 0; i < count; i++) {
+ if ((retval = ejtag_dma_write_b(ejtag_info, addr + i*sizeof(*buf), buf[i])) != ERROR_OK)
return retval;
}