cortex a8: add missing error handling from cortex_a8_exec_opcode()

[openocd] / src / target / mips_ejtag.h

diff --git a/src/target/mips_ejtag.h b/src/target/mips_ejtag.h
index 164edd01071869b744b32430f8850d56870273bf..694cb34479585b580298e18536ea421244fdf772 100644 (file)
--- a/src/target/mips_ejtag.h
+++ b/src/target/mips_ejtag.h
@@ -48,6 +48,8 @@
 /* microchip specific cmds */
 #define MCHP_ASERT_RST                 0xd1
 #define MCHP_DE_ASSERT_RST             0xd0
+#define MCHP_ERASE                             0xfc
+#define MCHP_STATUS                            0x00
 
 /* ejtag control register bits ECR */
 #define EJTAG_CTRL_TOF                 (1 << 1)
@@ -132,7 +134,6 @@ int mips_ejtag_set_instr(struct mips_ejtag *ejtag_info,
                int new_instr);
 int mips_ejtag_enter_debug(struct mips_ejtag *ejtag_info);
 int mips_ejtag_exit_debug(struct mips_ejtag *ejtag_info);
-int mips_ejtag_get_impcode(struct mips_ejtag *ejtag_info, uint32_t *impcode);
 int mips_ejtag_get_idcode(struct mips_ejtag *ejtag_info, uint32_t *idcode);
 int mips_ejtag_drscan_32(struct mips_ejtag *ejtag_info, uint32_t *data);
 int mips_ejtag_drscan_8(struct mips_ejtag *ejtag_info, uint32_t *data);