armv4_5_common_t -> struct arm

[openocd] / src / target / mips_m4k.c

diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c
index 40e17d16c3563839915fe8186ee00dbea5b29e4d..095260c3db99a97f78b6483beb034a2a715d9b5a 100644 (file)
--- a/src/target/mips_m4k.c
+++ b/src/target/mips_m4k.c
@@ -41,7 +41,6 @@ int mips_m4k_read_memory(struct target_s *target, uint32_t address, uint32_t siz
 int mips_m4k_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
 int mips_m4k_register_commands(struct command_context_s *cmd_ctx);
 int mips_m4k_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
-int mips_m4k_quit(void);
 int mips_m4k_target_create(struct target_s *target, Jim_Interp *interp);
 
 int mips_m4k_examine(struct target_s *target);
@@ -85,7 +84,6 @@ target_type_t mips_m4k_target =
        .target_create = mips_m4k_target_create,
        .init_target = mips_m4k_init_target,
        .examine = mips_m4k_examine,
-       .quit = mips_m4k_quit
 };
 
 int mips_m4k_examine_debug_reason(target_t *target)
@@ -124,8 +122,8 @@ int mips_m4k_examine_debug_reason(target_t *target)
 
 int mips_m4k_debug_entry(target_t *target)
 {
-       mips32_common_t *mips32 = target->arch_info;
-       mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+       struct mips32_common *mips32 = target->arch_info;
+       struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
        uint32_t debug_reg;
 
        /* read debug register */
@@ -156,8 +154,8 @@ int mips_m4k_debug_entry(target_t *target)
 int mips_m4k_poll(target_t *target)
 {
        int retval;
-       mips32_common_t *mips32 = target->arch_info;
-       mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+       struct mips32_common *mips32 = target->arch_info;
+       struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
        uint32_t ejtag_ctrl = ejtag_info->ejtag_ctrl;
 
        /* read ejtag control reg */
@@ -216,8 +214,8 @@ int mips_m4k_poll(target_t *target)
 
 int mips_m4k_halt(struct target_s *target)
 {
-       mips32_common_t *mips32 = target->arch_info;
-       mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+       struct mips32_common *mips32 = target->arch_info;
+       struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
 
        LOG_DEBUG("target->state: %s",
                  target_state_name(target));
@@ -261,8 +259,8 @@ int mips_m4k_halt(struct target_s *target)
 
 int mips_m4k_assert_reset(target_t *target)
 {
-       mips32_common_t *mips32 = target->arch_info;
-       mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+       struct mips32_common *mips32 = target->arch_info;
+       struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
 
        LOG_DEBUG("target->state: %s",
                target_state_name(target));
@@ -340,8 +338,8 @@ int mips_m4k_soft_reset_halt(struct target_s *target)
 
 int mips_m4k_single_step_core(target_t *target)
 {
-       mips32_common_t *mips32 = target->arch_info;
-       mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+       struct mips32_common *mips32 = target->arch_info;
+       struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
 
        /* configure single step mode */
        mips_ejtag_config_step(ejtag_info, 1);
@@ -359,9 +357,9 @@ int mips_m4k_single_step_core(target_t *target)
 
 int mips_m4k_resume(struct target_s *target, int current, uint32_t address, int handle_breakpoints, int debug_execution)
 {
-       mips32_common_t *mips32 = target->arch_info;
-       mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
-       breakpoint_t *breakpoint = NULL;
+       struct mips32_common *mips32 = target->arch_info;
+       struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
+       struct breakpoint *breakpoint = NULL;
        uint32_t resume_pc;
 
        if (target->state != TARGET_HALTED)
@@ -431,9 +429,9 @@ int mips_m4k_resume(struct target_s *target, int current, uint32_t address, int
 int mips_m4k_step(struct target_s *target, int current, uint32_t address, int handle_breakpoints)
 {
        /* get pointers to arch-specific information */
-       mips32_common_t *mips32 = target->arch_info;
-       mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
-       breakpoint_t *breakpoint = NULL;
+       struct mips32_common *mips32 = target->arch_info;
+       struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
+       struct breakpoint *breakpoint = NULL;
 
        if (target->state != TARGET_HALTED)
        {
@@ -482,7 +480,7 @@ int mips_m4k_step(struct target_s *target, int current, uint32_t address, int ha
 
 void mips_m4k_enable_breakpoints(struct target_s *target)
 {
-       breakpoint_t *breakpoint = target->breakpoints;
+       struct breakpoint *breakpoint = target->breakpoints;
 
        /* set any pending breakpoints */
        while (breakpoint)
@@ -493,10 +491,10 @@ void mips_m4k_enable_breakpoints(struct target_s *target)
        }
 }
 
-int mips_m4k_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
+int mips_m4k_set_breakpoint(struct target_s *target, struct breakpoint *breakpoint)
 {
-       mips32_common_t *mips32 = target->arch_info;
-       mips32_comparator_t * comparator_list = mips32->inst_break_list;
+       struct mips32_common *mips32 = target->arch_info;
+       struct mips32_comparator * comparator_list = mips32->inst_break_list;
        int retval;
 
        if (breakpoint->set)
@@ -524,7 +522,7 @@ int mips_m4k_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
                target_write_u32(target, comparator_list[bp_num].reg_address, comparator_list[bp_num].bp_value);
                target_write_u32(target, comparator_list[bp_num].reg_address + 0x08, 0x00000000);
                target_write_u32(target, comparator_list[bp_num].reg_address + 0x18, 1);
-               LOG_DEBUG("bpid: %d, bp_num %i bp_value 0x%" PRIx32 "", 
+               LOG_DEBUG("bpid: %d, bp_num %i bp_value 0x%" PRIx32 "",
                                  breakpoint->unique_id,
                                  bp_num, comparator_list[bp_num].bp_value);
        }
@@ -584,11 +582,11 @@ int mips_m4k_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
        return ERROR_OK;
 }
 
-int mips_m4k_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
+int mips_m4k_unset_breakpoint(struct target_s *target, struct breakpoint *breakpoint)
 {
        /* get pointers to arch-specific information */
-       mips32_common_t *mips32 = target->arch_info;
-       mips32_comparator_t * comparator_list = mips32->inst_break_list;
+       struct mips32_common *mips32 = target->arch_info;
+       struct mips32_comparator * comparator_list = mips32->inst_break_list;
        int retval;
 
        if (!breakpoint->set)
@@ -612,7 +610,7 @@ int mips_m4k_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
                comparator_list[bp_num].used = 0;
                comparator_list[bp_num].bp_value = 0;
                target_write_u32(target, comparator_list[bp_num].reg_address + 0x18, 0);
-               
+
        }
        else
        {
@@ -659,9 +657,9 @@ int mips_m4k_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
        return ERROR_OK;
 }
 
-int mips_m4k_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
+int mips_m4k_add_breakpoint(struct target_s *target, struct breakpoint *breakpoint)
 {
-       mips32_common_t *mips32 = target->arch_info;
+       struct mips32_common *mips32 = target->arch_info;
 
        if (breakpoint->type == BKPT_HARD)
        {
@@ -679,10 +677,10 @@ int mips_m4k_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
        return ERROR_OK;
 }
 
-int mips_m4k_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
+int mips_m4k_remove_breakpoint(struct target_s *target, struct breakpoint *breakpoint)
 {
        /* get pointers to arch-specific information */
-       mips32_common_t *mips32 = target->arch_info;
+       struct mips32_common *mips32 = target->arch_info;
 
        if (target->state != TARGET_HALTED)
        {
@@ -701,19 +699,19 @@ int mips_m4k_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoint
        return ERROR_OK;
 }
 
-int mips_m4k_set_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
+int mips_m4k_set_watchpoint(struct target_s *target, struct watchpoint *watchpoint)
 {
-       mips32_common_t *mips32 = target->arch_info;
-       mips32_comparator_t * comparator_list = mips32->data_break_list;
+       struct mips32_common *mips32 = target->arch_info;
+       struct mips32_comparator * comparator_list = mips32->data_break_list;
        int wp_num = 0;
        /*
         * watchpoint enabled, ignore all byte lanes in value register
         * and exclude both load and store accesses from  watchpoint
         * condition evaluation
        */
-       int enable = EJTAG_DBCn_NOSB | EJTAG_DBCn_NOLB | EJTAG_DBCn_BE | 
+       int enable = EJTAG_DBCn_NOSB | EJTAG_DBCn_NOLB | EJTAG_DBCn_BE |
                 (0xff << EJTAG_DBCn_BLM_SHIFT);
-       
+
        if (watchpoint->set)
        {
                LOG_WARNING("watchpoint already set");
@@ -765,16 +763,16 @@ int mips_m4k_set_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
        target_write_u32(target, comparator_list[wp_num].reg_address + 0x18, enable);
        target_write_u32(target, comparator_list[wp_num].reg_address + 0x20, 0);
        LOG_DEBUG("wp_num %i bp_value 0x%" PRIx32 "", wp_num, comparator_list[wp_num].bp_value);
-       
+
        return ERROR_OK;
 }
 
-int mips_m4k_unset_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
+int mips_m4k_unset_watchpoint(struct target_s *target, struct watchpoint *watchpoint)
 {
        /* get pointers to arch-specific information */
-       mips32_common_t *mips32 = target->arch_info;
-       mips32_comparator_t * comparator_list = mips32->data_break_list;
-       
+       struct mips32_common *mips32 = target->arch_info;
+       struct mips32_comparator * comparator_list = mips32->data_break_list;
+
        if (!watchpoint->set)
        {
                LOG_WARNING("watchpoint not set");
@@ -795,26 +793,26 @@ int mips_m4k_unset_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
        return ERROR_OK;
 }
 
-int mips_m4k_add_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
+int mips_m4k_add_watchpoint(struct target_s *target, struct watchpoint *watchpoint)
 {
-       mips32_common_t *mips32 = target->arch_info;
+       struct mips32_common *mips32 = target->arch_info;
 
        if (mips32->num_data_bpoints_avail < 1)
        {
                LOG_INFO("no hardware watchpoints available");
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
        }
-               
+
        mips32->num_data_bpoints_avail--;
 
        mips_m4k_set_watchpoint(target, watchpoint);
        return ERROR_OK;
 }
 
-int mips_m4k_remove_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
+int mips_m4k_remove_watchpoint(struct target_s *target, struct watchpoint *watchpoint)
 {
        /* get pointers to arch-specific information */
-       mips32_common_t *mips32 = target->arch_info;
+       struct mips32_common *mips32 = target->arch_info;
 
        if (target->state != TARGET_HALTED)
        {
@@ -834,7 +832,7 @@ int mips_m4k_remove_watchpoint(struct target_s *target, watchpoint_t *watchpoint
 
 void mips_m4k_enable_watchpoints(struct target_s *target)
 {
-       watchpoint_t *watchpoint = target->watchpoints;
+       struct watchpoint *watchpoint = target->watchpoints;
 
        /* set any pending watchpoints */
        while (watchpoint)
@@ -847,8 +845,8 @@ void mips_m4k_enable_watchpoints(struct target_s *target)
 
 int mips_m4k_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
 {
-       mips32_common_t *mips32 = target->arch_info;
-       mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+       struct mips32_common *mips32 = target->arch_info;
+       struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
 
        LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "", address, size, count);
 
@@ -879,8 +877,8 @@ int mips_m4k_read_memory(struct target_s *target, uint32_t address, uint32_t siz
 
 int mips_m4k_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
 {
-       mips32_common_t *mips32 = target->arch_info;
-       mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+       struct mips32_common *mips32 = target->arch_info;
+       struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
 
        LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "", address, size, count);
 
@@ -919,14 +917,9 @@ int mips_m4k_init_target(struct command_context_s *cmd_ctx, struct target_s *tar
        return ERROR_OK;
 }
 
-int mips_m4k_quit(void)
-{
-       return ERROR_OK;
-}
-
-int mips_m4k_init_arch_info(target_t *target, mips_m4k_common_t *mips_m4k, jtag_tap_t *tap)
+int mips_m4k_init_arch_info(target_t *target, struct mips_m4k_common *mips_m4k, struct jtag_tap *tap)
 {
-       mips32_common_t *mips32 = &mips_m4k->mips32_common;
+       struct mips32_common *mips32 = &mips_m4k->mips32_common;
 
        mips_m4k->common_magic = MIPSM4K_COMMON_MAGIC;
 
@@ -939,7 +932,7 @@ int mips_m4k_init_arch_info(target_t *target, mips_m4k_common_t *mips_m4k, jtag_
 
 int mips_m4k_target_create(struct target_s *target, Jim_Interp *interp)
 {
-       mips_m4k_common_t *mips_m4k = calloc(1,sizeof(mips_m4k_common_t));
+       struct mips_m4k_common *mips_m4k = calloc(1,sizeof(struct mips_m4k_common));
 
        mips_m4k_init_arch_info(target, mips_m4k, target->tap);
 
@@ -949,8 +942,8 @@ int mips_m4k_target_create(struct target_s *target, Jim_Interp *interp)
 int mips_m4k_examine(struct target_s *target)
 {
        int retval;
-       mips32_common_t *mips32 = target->arch_info;
-       mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+       struct mips32_common *mips32 = target->arch_info;
+       struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
        uint32_t idcode = 0;
 
        if (!target_was_examined(target))