arm_dpm: -Wshadow warning fix

[openocd] / src / target / mips_m4k.c

diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c
index d1b458914b4a4725d696d38db9ed7f1ae675bd7a..5604b6a55b4360061ecf59d031a0b90ae09beceb 100644 (file)
--- a/src/target/mips_m4k.c
+++ b/src/target/mips_m4k.c
@@ -112,8 +112,7 @@ int mips_m4k_poll(struct target *target)
        uint32_t ejtag_ctrl = ejtag_info->ejtag_ctrl;
 
        /* read ejtag control reg */
-       jtag_set_end_state(TAP_IDLE);
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
        /* clear this bit before handling polling
@@ -122,10 +121,9 @@ int mips_m4k_poll(struct target *target)
        {
                /* we have detected a reset, clear flag
                 * otherwise ejtag will not work */
-               jtag_set_end_state(TAP_IDLE);
                ejtag_ctrl = ejtag_info->ejtag_ctrl & ~EJTAG_CTRL_ROCC;
 
-               mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+               mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
                mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
                LOG_DEBUG("Reset Detected");
        }
@@ -135,8 +133,7 @@ int mips_m4k_poll(struct target *target)
        {
                if ((target->state == TARGET_RUNNING) || (target->state == TARGET_RESET))
                {
-                       jtag_set_end_state(TAP_IDLE);
-                       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_NORMALBOOT, NULL);
+                       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_NORMALBOOT);
 
                        target->state = TARGET_HALTED;
 
@@ -227,13 +224,11 @@ int mips_m4k_assert_reset(struct target *target)
        if (target->reset_halt)
        {
                /* use hardware to catch reset */
-               jtag_set_end_state(TAP_IDLE);
-               mips_ejtag_set_instr(ejtag_info, EJTAG_INST_EJTAGBOOT, NULL);
+               mips_ejtag_set_instr(ejtag_info, EJTAG_INST_EJTAGBOOT);
        }
        else
        {
-               jtag_set_end_state(TAP_IDLE);
-               mips_ejtag_set_instr(ejtag_info, EJTAG_INST_NORMALBOOT, NULL);
+               mips_ejtag_set_instr(ejtag_info, EJTAG_INST_NORMALBOOT);
        }
 
        if (assert_srst)
@@ -257,21 +252,21 @@ int mips_m4k_assert_reset(struct target *target)
                        LOG_DEBUG("Using MTAP reset to reset processor...");
 
                        /* use microchip specific MTAP reset */
-                       mips_ejtag_set_instr(ejtag_info, MTAP_SW_MTAP, NULL);
-                       mips_ejtag_set_instr(ejtag_info, MTAP_COMMAND, NULL);
+                       mips_ejtag_set_instr(ejtag_info, MTAP_SW_MTAP);
+                       mips_ejtag_set_instr(ejtag_info, MTAP_COMMAND);
 
                        mchip_cmd = MCHP_ASERT_RST;
                        mips_ejtag_drscan_8(ejtag_info, &mchip_cmd);
                        mchip_cmd = MCHP_DE_ASSERT_RST;
                        mips_ejtag_drscan_8(ejtag_info, &mchip_cmd);
-                       mips_ejtag_set_instr(ejtag_info, MTAP_SW_ETAP, NULL);
+                       mips_ejtag_set_instr(ejtag_info, MTAP_SW_ETAP);
                }
                else
                {
                        /* use ejtag reset - not supported by all cores */
                        uint32_t ejtag_ctrl = ejtag_info->ejtag_ctrl | EJTAG_CTRL_PRRST | EJTAG_CTRL_PERRST;
                        LOG_DEBUG("Using EJTAG reset (PRRST) to reset processor...");
-                       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+                       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
                        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
                }
        }
@@ -933,7 +928,7 @@ int mips_m4k_examine(struct target *target)
                {
                        /* we are using a pic32mx so select ejtag port
                         * as it is not selected by default */
-                       mips_ejtag_set_instr(ejtag_info, MTAP_SW_ETAP, NULL);
+                       mips_ejtag_set_instr(ejtag_info, MTAP_SW_ETAP);
                        LOG_DEBUG("PIC32MX Detected - using EJTAG Interface");
                        mips_m4k->is_pic32mx = true;
                }