}
/* get info about data breakpoint support */
- if ((retval = target_read_u32(target, 0xFF302000, &break_status)) != ERROR_OK)
+ if ((retval = target_read_u32(target, EJTAG_DBS, &break_status)) != ERROR_OK)
return retval;
if (break_status & 0x1f)
{
/* we have halted on a breakpoint */
- if ((retval = target_write_u32(target, 0xFF302000, 0)) != ERROR_OK)
+ if ((retval = target_write_u32(target, EJTAG_DBS, 0)) != ERROR_OK)
return retval;
target->debug_reason = DBG_REASON_WATCHPOINT;
}
int mips_m4k_debug_entry(struct target *target)
{
- struct mips32_common *mips32 = target->arch_info;
+ struct mips32_common *mips32 = target_to_mips32(target);
struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
uint32_t debug_reg;
/* read debug register */
mips_ejtag_read_debug(ejtag_info, &debug_reg);
- /* make sure break uit configured */
+ /* make sure break unit configured */
mips32_configure_break_unit(target);
/* attempt to find halt reason */
mips32_save_context(target);
+ /* default to mips32 isa, it will be changed below if required */
+ mips32->isa_mode = MIPS32_ISA_MIPS32;
+
+ if (ejtag_info->impcode & EJTAG_IMP_MIPS16)
+ {
+ if (buf_get_u32(mips32->core_cache->reg_list[MIPS32_PC].value, 0, 32) & 0x01)
+ {
+ /* core is running mips16e isa */
+ mips32->isa_mode = MIPS32_ISA_MIPS16E;
+ }
+ }
+
LOG_DEBUG("entered debug state at PC 0x%" PRIx32 ", target->state: %s",
- *(uint32_t*)(mips32->core_cache->reg_list[MIPS32_PC].value),
- target_state_name(target));
+ buf_get_u32(mips32->core_cache->reg_list[MIPS32_PC].value, 0, 32),
+ target_state_name(target));
return ERROR_OK;
}
int mips_m4k_poll(struct target *target)
{
int retval;
- struct mips32_common *mips32 = target->arch_info;
+ struct mips32_common *mips32 = target_to_mips32(target);
struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
uint32_t ejtag_ctrl = ejtag_info->ejtag_ctrl;
int mips_m4k_halt(struct target *target)
{
- struct mips32_common *mips32 = target->arch_info;
+ struct mips32_common *mips32 = target_to_mips32(target);
struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
LOG_DEBUG("target->state: %s",
int mips_m4k_assert_reset(struct target *target)
{
- struct mips32_common *mips32 = target->arch_info;
+ struct mips32_common *mips32 = target_to_mips32(target);
struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
LOG_DEBUG("target->state: %s",
int mips_m4k_single_step_core(struct target *target)
{
- struct mips32_common *mips32 = target->arch_info;
+ struct mips32_common *mips32 = target_to_mips32(target);
struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
/* configure single step mode */
int mips_m4k_resume(struct target *target, int current, uint32_t address, int handle_breakpoints, int debug_execution)
{
- struct mips32_common *mips32 = target->arch_info;
+ struct mips32_common *mips32 = target_to_mips32(target);
struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
struct breakpoint *breakpoint = NULL;
uint32_t resume_pc;
int mips_m4k_step(struct target *target, int current, uint32_t address, int handle_breakpoints)
{
/* get pointers to arch-specific information */
- struct mips32_common *mips32 = target->arch_info;
+ struct mips32_common *mips32 = target_to_mips32(target);
struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
struct breakpoint *breakpoint = NULL;
int mips_m4k_set_breakpoint(struct target *target, struct breakpoint *breakpoint)
{
- struct mips32_common *mips32 = target->arch_info;
+ struct mips32_common *mips32 = target_to_mips32(target);
struct mips32_comparator * comparator_list = mips32->inst_break_list;
int retval;
int mips_m4k_unset_breakpoint(struct target *target, struct breakpoint *breakpoint)
{
/* get pointers to arch-specific information */
- struct mips32_common *mips32 = target->arch_info;
- struct mips32_comparator * comparator_list = mips32->inst_break_list;
+ struct mips32_common *mips32 = target_to_mips32(target);
+ struct mips32_comparator *comparator_list = mips32->inst_break_list;
int retval;
if (!breakpoint->set)
int mips_m4k_add_breakpoint(struct target *target, struct breakpoint *breakpoint)
{
- struct mips32_common *mips32 = target->arch_info;
+ struct mips32_common *mips32 = target_to_mips32(target);
if (breakpoint->type == BKPT_HARD)
{
int mips_m4k_remove_breakpoint(struct target *target, struct breakpoint *breakpoint)
{
/* get pointers to arch-specific information */
- struct mips32_common *mips32 = target->arch_info;
+ struct mips32_common *mips32 = target_to_mips32(target);
if (target->state != TARGET_HALTED)
{
int mips_m4k_set_watchpoint(struct target *target, struct watchpoint *watchpoint)
{
- struct mips32_common *mips32 = target->arch_info;
- struct mips32_comparator * comparator_list = mips32->data_break_list;
+ struct mips32_common *mips32 = target_to_mips32(target);
+ struct mips32_comparator *comparator_list = mips32->data_break_list;
int wp_num = 0;
/*
* watchpoint enabled, ignore all byte lanes in value register
int mips_m4k_unset_watchpoint(struct target *target, struct watchpoint *watchpoint)
{
/* get pointers to arch-specific information */
- struct mips32_common *mips32 = target->arch_info;
- struct mips32_comparator * comparator_list = mips32->data_break_list;
+ struct mips32_common *mips32 = target_to_mips32(target);
+ struct mips32_comparator *comparator_list = mips32->data_break_list;
if (!watchpoint->set)
{
int mips_m4k_add_watchpoint(struct target *target, struct watchpoint *watchpoint)
{
- struct mips32_common *mips32 = target->arch_info;
+ struct mips32_common *mips32 = target_to_mips32(target);
if (mips32->num_data_bpoints_avail < 1)
{
int mips_m4k_remove_watchpoint(struct target *target, struct watchpoint *watchpoint)
{
/* get pointers to arch-specific information */
- struct mips32_common *mips32 = target->arch_info;
+ struct mips32_common *mips32 = target_to_mips32(target);
if (target->state != TARGET_HALTED)
{
int mips_m4k_read_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
{
- struct mips32_common *mips32 = target->arch_info;
+ struct mips32_common *mips32 = target_to_mips32(target);
struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "", address, size, count);
int mips_m4k_write_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
{
- struct mips32_common *mips32 = target->arch_info;
+ struct mips32_common *mips32 = target_to_mips32(target);
struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "", address, size, count);
int mips_m4k_target_create(struct target *target, Jim_Interp *interp)
{
- struct mips_m4k_common *mips_m4k = calloc(1,sizeof(struct mips_m4k_common));
+ struct mips_m4k_common *mips_m4k = calloc(1, sizeof(struct mips_m4k_common));
mips_m4k_init_arch_info(target, mips_m4k, target->tap);
int mips_m4k_examine(struct target *target)
{
int retval;
- struct mips32_common *mips32 = target->arch_info;
+ struct mips32_common *mips32 = target_to_mips32(target);
struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
uint32_t idcode = 0;
int mips_m4k_bulk_write_memory(struct target *target, uint32_t address, uint32_t count, uint8_t *buffer)
{
- struct mips32_common *mips32 = target->arch_info;
+ struct mips32_common *mips32 = target_to_mips32(target);
struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
struct working_area *source;
int retval;
int write = 1;
- LOG_DEBUG("address: 0x%8.8x, count: 0x%8.8x", address, count);
+ LOG_DEBUG("address: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "", address, count);
if (target->state != TARGET_HALTED)
{
if (retval != ERROR_OK)
{
/* FASTDATA access failed, try normal memory write */
- LOG_WARNING("Fastdata access Failed, falling back to non-bulk write");
+ LOG_DEBUG("Fastdata access Failed, falling back to non-bulk write");
retval = mips_m4k_write_memory(target, address, 4, count, buffer);
}