Author: Spencer Oliver <spen@spen-soft.co.uk>

[openocd] / src / target / mips_m4k.c

diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c
index b1a4e46abeaed652c42dc7b049a14b1cf005202e..6d331d4e4bc75337154a98469ed21c1c81f61602 100644 (file)
--- a/src/target/mips_m4k.c
+++ b/src/target/mips_m4k.c
@@ -26,11 +26,7 @@
 #include "mips32.h"
 #include "mips_m4k.h"
 #include "mips32_dmaacc.h"
-#include "jtag.h"
-#include "log.h"
 
-#include <stdlib.h>
-#include <string.h>
 
 /* cli handling */
 
@@ -93,7 +89,7 @@ target_type_t mips_m4k_target =
 
 int mips_m4k_examine_debug_reason(target_t *target)
 {
-       int break_status;
+       u32 break_status;
        int retval;
 
        if ((target->debug_reason != DBG_REASON_DBGRQ)
@@ -348,8 +344,11 @@ int mips_m4k_single_step_core(target_t *target)
        /* configure single step mode */
        mips_ejtag_config_step(ejtag_info, 1);
 
+       /* disable interrupts while stepping */
+       mips32_enable_interrupts(target, 0);
+       
        /* exit debug mode */
-       mips_ejtag_exit_debug(ejtag_info, 1);
+       mips_ejtag_exit_debug(ejtag_info);
 
        mips_m4k_debug_entry(target);
 
@@ -401,8 +400,11 @@ int mips_m4k_resume(struct target_s *target, int current, u32 address, int handl
                }
        }
 
-       /* exit debug mode - enable interrupts if required */
-       mips_ejtag_exit_debug(ejtag_info, !debug_execution);
+       /* enable interrupts if we are running */
+       mips32_enable_interrupts(target, !debug_execution);
+       
+       /* exit debug mode */
+       mips_ejtag_exit_debug(ejtag_info);
        target->debug_reason = DBG_REASON_NOTHALTED;
 
        /* registers are now invalid */
@@ -456,8 +458,11 @@ int mips_m4k_step(struct target_s *target, int current, u32 address, int handle_
 
        target_call_event_callbacks(target, TARGET_EVENT_RESUMED);
 
+       /* disable interrupts while stepping */
+       mips32_enable_interrupts(target, 0);
+               
        /* exit debug mode */
-       mips_ejtag_exit_debug(ejtag_info, 1);
+       mips_ejtag_exit_debug(ejtag_info);
 
        /* registers are now invalid */
        mips32_invalidate_core_regs(target);