arm_adi_v5: Add part numbers for Infineon XMC4000 family

[openocd] / src / target / nds32_aice.h

diff --git a/src/target/nds32_aice.h b/src/target/nds32_aice.h
index 6c74e69d832e0c6dcf481d2a3de5c14bbb7026e1..d53564330109c046a49dbadeb2d71f60cb05855a 100644 (file)
--- a/src/target/nds32_aice.h
+++ b/src/target/nds32_aice.h
@@ -24,7 +24,6 @@
 
 int aice_read_reg_64(struct aice_port_s *aice, uint32_t num, uint64_t *val);
 int aice_write_reg_64(struct aice_port_s *aice, uint32_t num, uint64_t val);
-int aice_select_target(struct aice_port_s *aice, uint32_t target_id);
 int aice_read_tlb(struct aice_port_s *aice, uint32_t virtual_address,
                uint32_t *physical_address);
 int aice_cache_ctl(struct aice_port_s *aice, uint32_t subtype, uint32_t address);
@@ -38,6 +37,8 @@ int aice_set_custom_srst_script(struct aice_port_s *aice, const char *script);
 int aice_set_custom_trst_script(struct aice_port_s *aice, const char *script);
 int aice_set_custom_restart_script(struct aice_port_s *aice, const char *script);
 int aice_set_count_to_check_dbger(struct aice_port_s *aice, uint32_t count_to_check);
+int aice_profiling(struct aice_port_s *aice, uint32_t interval, uint32_t iteration,
+               uint32_t reg_no, uint32_t *samples, uint32_t *num_samples);
 
 static inline int aice_open(struct aice_port_s *aice, struct aice_port_param_s *param)
 {
@@ -57,70 +58,70 @@ static inline int aice_reset(struct aice_port_s *aice)
 static inline int aice_assert_srst(struct aice_port_s *aice,
                enum aice_srst_type_s srst)
 {
-       return aice->port->api->assert_srst(srst);
+       return aice->port->api->assert_srst(aice->coreid, srst);
 }
 
 static inline int aice_run(struct aice_port_s *aice)
 {
-       return aice->port->api->run();
+       return aice->port->api->run(aice->coreid);
 }
 
 static inline int aice_halt(struct aice_port_s *aice)
 {
-       return aice->port->api->halt();
+       return aice->port->api->halt(aice->coreid);
 }
 
 static inline int aice_step(struct aice_port_s *aice)
 {
-       return aice->port->api->step();
+       return aice->port->api->step(aice->coreid);
 }
 
 static inline int aice_read_register(struct aice_port_s *aice, uint32_t num,
                uint32_t *val)
 {
-       return aice->port->api->read_reg(num, val);
+       return aice->port->api->read_reg(aice->coreid, num, val);
 }
 
 static inline int aice_write_register(struct aice_port_s *aice, uint32_t num,
                uint32_t val)
 {
-       return aice->port->api->write_reg(num, val);
+       return aice->port->api->write_reg(aice->coreid, num, val);
 }
 
 static inline int aice_read_debug_reg(struct aice_port_s *aice, uint32_t addr,
                uint32_t *val)
 {
-       return aice->port->api->read_debug_reg(addr, val);
+       return aice->port->api->read_debug_reg(aice->coreid, addr, val);
 }
 
 static inline int aice_write_debug_reg(struct aice_port_s *aice, uint32_t addr,
                const uint32_t val)
 {
-       return aice->port->api->write_debug_reg(addr, val);
+       return aice->port->api->write_debug_reg(aice->coreid, addr, val);
 }
 
 static inline int aice_read_mem_unit(struct aice_port_s *aice, uint32_t addr,
                uint32_t size, uint32_t count, uint8_t *buffer)
 {
-       return aice->port->api->read_mem_unit(addr, size, count, buffer);
+       return aice->port->api->read_mem_unit(aice->coreid, addr, size, count, buffer);
 }
 
 static inline int aice_write_mem_unit(struct aice_port_s *aice, uint32_t addr,
                uint32_t size, uint32_t count, const uint8_t *buffer)
 {
-       return aice->port->api->write_mem_unit(addr, size, count, buffer);
+       return aice->port->api->write_mem_unit(aice->coreid, addr, size, count, buffer);
 }
 
 static inline int aice_read_mem_bulk(struct aice_port_s *aice, uint32_t addr,
                uint32_t length, uint8_t *buffer)
 {
-       return aice->port->api->read_mem_bulk(addr, length, buffer);
+       return aice->port->api->read_mem_bulk(aice->coreid, addr, length, buffer);
 }
 
 static inline int aice_write_mem_bulk(struct aice_port_s *aice, uint32_t addr,
                uint32_t length, const uint8_t *buffer)
 {
-       return aice->port->api->write_mem_bulk(addr, length, buffer);
+       return aice->port->api->write_mem_bulk(aice->coreid, addr, length, buffer);
 }
 
 static inline int aice_idcode(struct aice_port_s *aice, uint32_t *idcode,
@@ -132,7 +133,7 @@ static inline int aice_idcode(struct aice_port_s *aice, uint32_t *idcode,
 static inline int aice_state(struct aice_port_s *aice,
                enum aice_target_state_s *state)
 {
-       return aice->port->api->state(state);
+       return aice->port->api->state(aice->coreid, state);
 }
 
 static inline int aice_set_jtag_clock(struct aice_port_s *aice, uint32_t a_clock)
@@ -143,19 +144,19 @@ static inline int aice_set_jtag_clock(struct aice_port_s *aice, uint32_t a_clock
 static inline int aice_memory_access(struct aice_port_s *aice,
                enum nds_memory_access a_access)
 {
-       return aice->port->api->memory_access(a_access);
+       return aice->port->api->memory_access(aice->coreid, a_access);
 }
 
 static inline int aice_memory_mode(struct aice_port_s *aice,
                enum nds_memory_select mem_select)
 {
-       return aice->port->api->memory_mode(mem_select);
+       return aice->port->api->memory_mode(aice->coreid, mem_select);
 }
 
 static inline int aice_set_data_endian(struct aice_port_s *aice,
                enum aice_target_endian target_data_endian)
 {
-       return aice->port->api->set_data_endian(target_data_endian);
+       return aice->port->api->set_data_endian(aice->coreid, target_data_endian);
 }
 
 #endif