]> git.sur5r.net Git - openocd/blobdiff - src/target/register.c
register: support non-existent registers
[openocd] / src / target / register.c
index 7b98cfcf83fde84bd22998b67a2a520945f785c0..850641448b637a276ced58748f5e504871ac4168 100644 (file)
@@ -2,6 +2,9 @@
  *   Copyright (C) 2005 by Dominic Rath                                    *
  *   Dominic.Rath@gmx.de                                                   *
  *                                                                         *
+ *   Copyright (C) 2007,2008 Ã˜yvind Harboe                                 *
+ *   oyvind.harboe@zylin.com                                               *
+ *                                                                         *
  *   This program is free software; you can redistribute it and/or modify  *
  *   it under the terms of the GNU General Public License as published by  *
  *   the Free Software Foundation; either version 2 of the License, or     *
  *   GNU General Public License for more details.                          *
  *                                                                         *
  *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  ***************************************************************************/
-#include "register.h"
 
-#include "log.h"
-#include "command.h"
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
 
-#include <string.h>
-#include <stdlib.h>
+#include "register.h"
+#include <helper/log.h>
 
-reg_arch_type_t *reg_arch_types = NULL;
+/**
+ * @file
+ * Holds utilities to work with register caches.
+ *
+ * OpenOCD uses machine registers internally, and exposes them by name
+ * to Tcl scripts.  Sets of related registers are grouped into caches.
+ * For example, a CPU core will expose a set of registers, and there
+ * may be separate registers associated with debug or trace modules.
+ */
 
-reg_t* register_get_by_name(reg_cache_t *first, char *name, int search_all)
+struct reg *register_get_by_name(struct reg_cache *first,
+               const char *name, bool search_all)
 {
-       int i;
-       reg_cache_t *cache = first;
-       
-       while (cache)
-       {
-               for (i = 0; i < cache->num_regs; i++)
-               {
+       unsigned i;
+       struct reg_cache *cache = first;
+
+       while (cache) {
+               for (i = 0; i < cache->num_regs; i++) {
+                       if (cache->reg_list[i].exist == false)
+                               continue;
                        if (strcmp(cache->reg_list[i].name, name) == 0)
                                return &(cache->reg_list[i]);
                }
-               
+
                if (search_all)
                        cache = cache->next;
                else
                        break;
        }
-       
+
        return NULL;
 }
 
-reg_cache_t** register_get_last_cache_p(reg_cache_t **first)
+struct reg_cache **register_get_last_cache_p(struct reg_cache **first)
 {
-       reg_cache_t **cache_p = first;
-       
+       struct reg_cache **cache_p = first;
+
        if (*cache_p)
                while (*cache_p)
                        cache_p = &((*cache_p)->next);
        else
                return first;
-       
+
        return cache_p;
 }
 
-int register_reg_arch_type(int (*get)(reg_t *reg), int (*set)(reg_t *reg, u32 value))
+void register_unlink_cache(struct reg_cache **cache_p, const struct reg_cache *cache)
 {
-       reg_arch_type_t** arch_type_p = &reg_arch_types;
-       int id = 0;
-       
-       if (*arch_type_p)
-       {
-               while (*arch_type_p)
-               {
-                       id = (*arch_type_p)->id;
-                       arch_type_p = &((*arch_type_p)->next);
-               }
-       }
-       
-       (*arch_type_p) = malloc(sizeof(reg_arch_type_t));
-       (*arch_type_p)->id = id + 1;
-       (*arch_type_p)->set = set;
-       (*arch_type_p)->get = get;
-       (*arch_type_p)->next = NULL;
-                       
-       return id + 1;
+       while (*cache_p && *cache_p != cache)
+               cache_p = &((*cache_p)->next);
+       if (*cache_p)
+               *cache_p = cache->next;
 }
 
-reg_arch_type_t* register_get_arch_type(int id)
+/** Marks the contents of the register cache as invalid (and clean). */
+void register_cache_invalidate(struct reg_cache *cache)
 {
-       reg_arch_type_t *arch_type = reg_arch_types;
-       
-       while (arch_type)
-       {
-               if (arch_type->id == id)
-                       return arch_type;
-               arch_type = arch_type->next;
+       struct reg *reg = cache->reg_list;
+
+       for (unsigned n = cache->num_regs; n != 0; n--, reg++) {
+               if (reg->exist == false)
+                       continue;
+               reg->valid = 0;
+               reg->dirty = 0;
        }
-       
-       return NULL;
+}
+
+static int register_get_dummy_core_reg(struct reg *reg)
+{
+       return ERROR_OK;
+}
+
+static int register_set_dummy_core_reg(struct reg *reg, uint8_t *buf)
+{
+       reg->dirty = 1;
+       reg->valid = 1;
+
+       return ERROR_OK;
+}
+
+static const struct reg_arch_type dummy_type = {
+       .get = register_get_dummy_core_reg,
+       .set = register_set_dummy_core_reg,
+};
+
+void register_init_dummy(struct reg *reg)
+{
+       reg->type = &dummy_type;
 }