fix instruction refilling bug when using software breakpoints on a big-endian arm926e...

[openocd] / src / target / target.c

diff --git a/src/target/target.c b/src/target/target.c
index d17bb7445fa119b579a28ee15e9bedfbb2f35a38..37e515a647a467881d61b9f44650417d52b810f8 100644 (file)
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -474,19 +474,6 @@ int target_resume(struct target *target, int current, uint32_t address, int hand
        if ((retval = target->type->resume(target, current, address, handle_breakpoints, debug_execution)) != ERROR_OK)
                return retval;
 
-       /* Invalidate any cached protect/erase/... flash status, since
-        * almost all targets will now be able modify the flash by
-        * themselves.  We want flash drivers and infrastructure to
-        * be able to rely on (non-invalidated) cached state.
-        *
-        * For now we require that algorithms provided by OpenOCD are
-        * used only by code which properly maintains that  cached state.
-        * state
-        *
-        * REVISIT do the same for NAND ; maybe other flash flavors too...
-        */
-               if (!target->running_alg)
-               nor_resume(target);
        return retval;
 }