-# MEMORY
+# MEMORY
#
# All Memory regions have two components.
# (1) A count of regions, in the form N_NAME
}
proc address_info { ADDRESS } {
-
+
foreach WHERE { FLASH RAM MMREGS XMEM UNKNOWN } {
if { info exists $WHERE } {
set lmt [set N_[set WHERE]]
proc memread32 {ADDR} {
set foo(0) 0
- if ![ catch { ocd_mem2array foo 32 $ADDR 1 } msg ] {
+ if ![ catch { mem2array foo 32 $ADDR 1 } msg ] {
return $foo(0)
} else {
error "memread32: $msg"
}
-}
+}
proc memread16 {ADDR} {
set foo(0) 0
- if ![ catch { ocd_mem2array foo 16 $ADDR 1 } msg ] {
+ if ![ catch { mem2array foo 16 $ADDR 1 } msg ] {
return $foo(0)
} else {
error "memread16: $msg"
}
-}
+}
proc memread8 {ADDR} {
set foo(0) 0
- if ![ catch { ocd_mem2array foo 8 $ADDR 1 } msg ] {
+ if ![ catch { mem2array foo 8 $ADDR 1 } msg ] {
return $foo(0)
} else {
error "memread8: $msg"
}
-}
+}
proc memwrite32 {ADDR DATA} {
set foo(0) $DATA
- if ![ catch { ocd_array2mem foo 32 $ADDR 1 } msg ] {
+ if ![ catch { array2mem foo 32 $ADDR 1 } msg ] {
return $foo(0)
} else {
error "memwrite32: $msg"
}
-}
+}
proc memwrite16 {ADDR DATA} {
set foo(0) $DATA
- if ![ catch { ocd_array2mem foo 16 $ADDR 1 } msg ] {
+ if ![ catch { array2mem foo 16 $ADDR 1 } msg ] {
return $foo(0)
} else {
error "memwrite16: $msg"
}
-}
+}
proc memwrite8 {ADDR DATA} {
set foo(0) $DATA
- if ![ catch { ocd_array2mem foo 8 $ADDR 1 } msg ] {
+ if ![ catch { array2mem foo 8 $ADDR 1 } msg ] {
return $foo(0)
} else {
error "memwrite8: $msg"
}
-}
+}