target: restructure dap support

[openocd] / tcl / target / cc26xx.cfg

diff --git a/tcl/target/cc26xx.cfg b/tcl/target/cc26xx.cfg
index 0fa460035144945a04e5cba8ce6ddd370947b90c..c3ac8470af8d46fb758f0d5030f2f5c729678444 100755 (executable)
--- a/tcl/target/cc26xx.cfg
+++ b/tcl/target/cc26xx.cfg
@@ -19,8 +19,8 @@ if { [info exists DAP_TAPID] } {
 } else {
    set _DAP_TAPID 0x4BA00477
 }
-jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable
-jtag configure $_CHIPNAME.dap -event tap-enable "icepick_c_tapenable $_CHIPNAME.jrc 0"
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable
+jtag configure $_CHIPNAME.cpu -event tap-enable "icepick_c_tapenable $_CHIPNAME.jrc 0"
 
 #
 # ICEpick-C (JTAG route controller)
@@ -33,11 +33,12 @@ if { [info exists JRC_TAPID] } {
 jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f -expected-id $_JRC_TAPID -ignore-version
 # A start sequence is needed to change from cJTAG (Compact JTAG) to
 # 4-pin JTAG before talking via JTAG commands
-jtag configure $_CHIPNAME.jrc -event setup "jtag tapenable $_CHIPNAME.dap"
+jtag configure $_CHIPNAME.jrc -event setup "jtag tapenable $_CHIPNAME.cpu"
 jtag configure $_CHIPNAME.jrc -event post-reset "ti_cjtag_to_4pin_jtag $_CHIPNAME.jrc"
 
 #
-# Cortex M3 target
+# Cortex-M3 target
 #
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m -chain-position $_CHIPNAME.dap
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap