target.cfg: label ETBs correctly

[openocd] / tcl / target / lpc2478.cfg

diff --git a/tcl/target/lpc2478.cfg b/tcl/target/lpc2478.cfg
index 1d2058b0440afdcd12e51a05093fbcb7f32b50e6..e78afa1ac2d9eca79df990fa137668e862f00045 100644 (file)
--- a/tcl/target/lpc2478.cfg
+++ b/tcl/target/lpc2478.cfg
@@ -31,7 +31,7 @@ set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
 
 # LPC2478 has 64kB of SRAM on its main system bus (so-called Local On-Chip SRAM)
-$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x10000 -work-area-backup 0
+$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x10000 -work-area-backup 0
 
 $_TARGETNAME configure -event reset-init {
        # Force target into ARM state
@@ -43,7 +43,7 @@ $_TARGETNAME configure -event reset-init {
 # LPC2378 has 512kB of FLASH, but upper 8kB are occupied by bootloader.
 # After reset the chip uses its internal 4MHz RC oscillator.
 # flash bank lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum]
-flash bank lpc2000 0x0 0x7D000 0 0 0 lpc2000_v2 12000 calc_checksum
+flash bank lpc2000 0x0 0x7D000 0 0 $_TARGETNAME lpc2000_v2 12000 calc_checksum
 
 # Try to use RCLK, if RCLK is not available use "normal" mode. 4MHz / 6 = 666kHz, so use 500.
 jtag_rclk 500