rename jtag_khz as adapter_khz

[openocd] / tcl / target / pxa255.cfg

diff --git a/tcl/target/pxa255.cfg b/tcl/target/pxa255.cfg
index 44efdaa4b9987f9d2abafae5eace0a20104fafc8..5b745f8599f752300bba9b1e19902e996ce26079 100644 (file)
--- a/tcl/target/pxa255.cfg
+++ b/tcl/target/pxa255.cfg
@@ -28,8 +28,8 @@ target create $_TARGETNAME xscale -endian $_ENDIAN \
 # PXA255 comes out of reset using 3.6864 MHz oscillator.
 # Until the PLL kicks in, keep the JTAG clock slow enough
 # that we get no errors.
-jtag_khz 300
-$_TARGETNAME configure -event "reset-start" { jtag_khz 300 }
+adapter_khz 300
+$_TARGETNAME configure -event "reset-start" { adapter_khz 300 }
 
 # both TRST and SRST are *required* for debug
 # DCSR is often accessed with SRST active