#define _IMXIMAGE_H_
#define MAX_HW_CFG_SIZE_V2 220 /* Max number of registers imx can set for v2 */
+#define MAX_PLUGIN_CODE_SIZE (64 * 1024)
#define MAX_HW_CFG_SIZE_V1 60 /* Max number of registers imx can set for v1 */
#define APP_CODE_BARKER 0xB1
#define DCD_BARKER 0xB17219E9
/*
* NOTE: This file must be kept in sync with arch/arm/include/asm/\
- * imx-common/imximage.cfg because tools/imximage.c can not
+ * mach-imx/imximage.cfg because tools/imximage.c can not
* cross-include headers from arch/arm/ and vice-versa.
*/
#define CMD_DATA_STR "DATA"
#define DCD_VERSION 0x40
#define DCD_WRITE_DATA_COMMAND_TAG 0xCC
#define DCD_WRITE_DATA_PARAM 0x4
-#define DCD_WRITE_CLR_BIT_PARAM 0xC
+#define DCD_WRITE_CLR_BIT_PARAM 0xC
+#define DCD_WRITE_SET_BIT_PARAM 0x1C
#define DCD_CHECK_DATA_COMMAND_TAG 0xCF
#define DCD_CHECK_BITS_SET_PARAM 0x14
#define DCD_CHECK_BITS_CLR_PARAM 0x04
CMD_BOOT_OFFSET,
CMD_WRITE_DATA,
CMD_WRITE_CLR_BIT,
+ CMD_WRITE_SET_BIT,
CMD_CHECK_BITS_SET,
CMD_CHECK_BITS_CLR,
CMD_CSF,
+ CMD_PLUGIN,
};
enum imximage_fld_types {
typedef struct {
flash_header_v2_t fhdr;
boot_data_t boot_data;
- dcd_v2_t dcd_table;
+ union {
+ dcd_v2_t dcd_table;
+ char plugin_code[MAX_PLUGIN_CODE_SIZE];
+ } data;
} imx_header_v2_t;
/* The header must be aligned to 4k on MX53 for NAND boot */