Correct alignment issue in GCC and RVDS Cortex-A9 port that was preventing full float...

Correct alignment issue in GCC and RVDS Cortex-A9 port that was preventing full floating point usage in interrupts (other ports will be updated likewise).
Update the Zynq demo to test the GCC Cortex-A9 port layer modification mentioned on the line above.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@2479 1d2547de-c912-0410-9cb9-b8ca96c0e9e2