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(parent: 89a54ab) | patch
arm: socfpga: Adding handoff for SDRAM ctrlcfg.extratime1
authorChin Liang See <clsee@altera.com>
Wed, 21 Sep 2016 02:25:57 +0000 (10:25 +0800)
committerMarek Vasut <marex@denx.de>
Thu, 27 Oct 2016 06:03:08 +0000 (08:03 +0200)
commit0db1ac47ee1e88e3d3784bcdb3a0e1ea277419cc
tree603becfb4e25d6a0005621f9c4a56640ac7cd4catree | snapshot
parent89a54abf1bd1a8a9ebbea9808199ec8ee3d902bdcommit | diff
arm: socfpga: Adding handoff for SDRAM ctrlcfg.extratime1

Adding new handoff for SDRAM ctrcfg.extratime1 which is
required for stable LPDDR2 operation. Since the board is
using DDR3, the handoff is set to default value 0.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
board/altera/arria5-socdk/qts/sdram_config.h diff | blob | history
board/altera/cyclone5-socdk/qts/sdram_config.h diff | blob | history
Cloned from git://git.denx.de/u-boot.git