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(parent: 40913fb) | patch
imx: mx6: fix mmdc ch0 clk for 6SL
authorPeng Fan <peng.fan@nxp.com>
Sun, 11 Dec 2016 11:24:25 +0000 (19:24 +0800)
committerStefano Babic <sbabic@denx.de>
Fri, 16 Dec 2016 10:38:24 +0000 (11:38 +0100)
commit0e81982de08fc93118c3dc49cc81def0d3801445
treeb221f86e0280526edfdd51d34d68f7a0b41aa023tree | snapshot
parent40913fb595d1f909acbe098b3cbb076c8a635ddacommit | diff
imx: mx6: fix mmdc ch0 clk for 6SL

>From RM, per_periph2_clk_sel option3 is:
"derive clock from 198MHz clock (divided 392MHz PLL2 PFD)."

So fix it.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
arch/arm/cpu/armv7/mx6/clock.c diff | blob | history
Cloned from git://git.denx.de/u-boot.git