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(parent: 651a70e) | patch
clk: clk_stm32f: Rework SDMMC stm32_clk_get_rate() part
authorPatrice Chotard <patrice.chotard@st.com>
Thu, 8 Feb 2018 16:20:48 +0000 (17:20 +0100)
committerTom Rini <trini@konsulko.com>
Wed, 14 Mar 2018 01:45:37 +0000 (21:45 -0400)
commit1038e033e1e999b11568c8daf0a4e19b31086266
tree4869670777b08e40763fbf2f209b4b711b585610tree | snapshot
parent651a70e8d58281fdc034864ad5a8c905e5541c89commit | diff
clk: clk_stm32f: Rework SDMMC stm32_clk_get_rate() part

Rework the way SDMMC clock get rate is done in a more
generic way :

_ Add stm32_clk_get_pllsai_rate() which give the PLLSAI
  indicated output rate.

_ Add stm32_clk_get_pllsai_vco_rate() which give the VCO
  internal rate.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
drivers/clk/clk_stm32f.c diff | blob | history
Cloned from git://git.denx.de/u-boot.git