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(parent: 2029363) | patch
arm: socfpga: de0-nano-soc: Adding handoff for SDRAM ctrlcfg.extratime1
authorChin Liang See <clsee@altera.com>
Wed, 21 Sep 2016 02:26:03 +0000 (10:26 +0800)
committerMarek Vasut <marex@denx.de>
Thu, 27 Oct 2016 06:03:11 +0000 (08:03 +0200)
commit13022d852d5c233894fabb62279a2ae9e0355638
tree2e9264cd77305cda12f2eb69f5b5ab16ab1b091atree | snapshot
parent202936395e7e3b0d5c2351fd273701b3e047a279commit | diff
arm: socfpga: de0-nano-soc: Adding handoff for SDRAM ctrlcfg.extratime1

Adding new handoff for SDRAM ctrcfg.extratime1 which is
required for stable LPDDR2 operation. Since the board is
using DDR3, the handoff is set to default value 0.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
board/terasic/de0-nano-soc/qts/sdram_config.h diff | blob | history
Cloned from git://git.denx.de/u-boot.git