axs101: flush DMA buffer descriptors before DMA transactons starts

axs101: flush DMA buffer descriptors before DMA transactons starts

CPU sets DMA buffer descriptors with data required for inetrnal DMA such as:
 * Ownership of BD
 * Buffer size
 * Pointer to data buffer in memory

Then we need to make sure DMA engine of NAND controller gets proper data.
For this we flush buffer rescriptor.

Then we're  ready for DMA transaction.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Tom Rini <trini@ti.com>