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powerpc: mpc85xx: Implement CPU erratum A-007907 for secondary cores
authorYork Sun <york.sun@nxp.com>
Tue, 17 Oct 2017 15:00:21 +0000 (08:00 -0700)
committerYork Sun <york.sun@nxp.com>
Mon, 23 Oct 2017 21:02:48 +0000 (14:02 -0700)
commit1e0d51a6c4cdd22a75abbdf392484c66ff8a91ea
tree39ffac198d3a9d03761940968c6b3d4591d48c4etree | snapshot
parentce0dea889a01d06bdc2d845fd03e90bcf8b49feccommit | diff
powerpc: mpc85xx: Implement CPU erratum A-007907 for secondary cores

Commit 06ad970b53a3 ("powerpc: mpc85xx: Implemente workaround for CPU
erratum A-007907") clears L1CSR2 for the boot core, but other cores
don't run through the workaround. Add similar code for secondary
cores to clear DCSTASHID field in L1CSR2 register.

Signed-off-by: York Sun <york.sun@nxp.com>
arch/powerpc/cpu/mpc85xx/release.S diff | blob | history
Cloned from git://git.denx.de/u-boot.git