]> git.sur5r.net Git - u-boot/commit
arm: armv8 correct value passed to __asm_dcache_all
authorPeng Fan <Peng.Fan@freescale.com>
Thu, 6 Aug 2015 09:54:13 +0000 (17:54 +0800)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>
Sat, 12 Sep 2015 07:03:39 +0000 (09:03 +0200)
commit208bd51396fb606dbdcf45b064e6b372d7dd3e81
treeea9d416358bda1ddc49af8e8a10ad741f89b1d8a
parented64190f67a28e9830371d424998b8aa924be9f3
arm: armv8 correct value passed to __asm_dcache_all

>From source code comments:
"x0: 0 flush & invalidate, 1 invalidate only"

Current value 0xffff can make invalidate work, since we only judge whether
input value is 0 or not, see following code:
"
    tbz     w1, #0, 1f
    dc      isw, x9
    b       2f
1:  dc      cisw, x9      /* clean & invalidate by set/way */
2:  subs    x6, x6, #1    /* decrement the way */
"

Later we may add "2 clean only" support. So following the comments,
correct value from 0xffff to 1.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: York Sun <yorksun@freescale.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
arch/arm/cpu/armv8/cache.S