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mxs: Explain why some mx23 DDR registers are not configured
authorFabio Estevam <fabio.estevam@freescale.com>
Sun, 5 May 2013 16:11:59 +0000 (16:11 +0000)
committerStefano Babic <sbabic@denx.de>
Mon, 6 May 2013 07:55:52 +0000 (09:55 +0200)
commit286a88cf34bcfec4a1051b5ee3553277e6c31e2e
tree59ad5d5e2f52b2afc05a4788756d56a4f9e1f9bftree | snapshot
parent0b323439a52daca171cf107a8f479a3ce18d1d3acommit | diff
mxs: Explain why some mx23 DDR registers are not configured

Put an explanation in the source code as to why some DDR registers do not
need to be configured.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c diff | blob | history
Cloned from git://git.denx.de/u-boot.git