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mtd: nand: mxs: fix cache alignment for cache lines >32
authorStefan Agner <stefan.agner@toradex.com>
Tue, 2 Aug 2016 06:55:18 +0000 (23:55 -0700)
committerStefano Babic <sbabic@denx.de>
Tue, 6 Sep 2016 16:22:48 +0000 (18:22 +0200)
commit2a83c95fdb9c2f735d1c30c71bc52f6fd8aa0f97
tree8ea80c18cfe906ace52ebf6bfe500c79db5c35e8tree | snapshot
parent0a22c7f0dc6265da71a522b78bc7a04d3ca934c3commit | diff
mtd: nand: mxs: fix cache alignment for cache lines >32

Currently the command buffer gets allocated with a size of 32 bytes.
This causes warning messages on systems with cache lines bigger than
32 bytes:
CACHE: Misaligned operation at range [9df17a00, 9df17a20]

Define command buffer to be at least 32 bytes, but more if cache
line is bigger.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
drivers/mtd/nand/mxs_nand.c diff | blob | history
Cloned from git://git.denx.de/u-boot.git