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(parent: ae3ed04) | patch
rockchip: clk: Add rv1108 SARADC clock support
authorDavid Wu <david.wu@rock-chips.com>
Wed, 20 Sep 2017 06:28:18 +0000 (14:28 +0800)
committerPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Sat, 30 Sep 2017 22:33:29 +0000 (00:33 +0200)
commit2e4ce50d1aca35d13944f48a7e15d0b63e86eb38
tree1aca6576b715876b47853f4aab24c0f353464676tree | snapshot
parentae3ed042ed31d1acbdd56938b45bd6c5076bebe3commit | diff
rockchip: clk: Add rv1108 SARADC clock support

The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1).
SARADC integer divider control register is 10-bits width.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
arch/arm/include/asm/arch-rockchip/cru_rv1108.h diff | blob | history
drivers/clk/rockchip/clk_rv1108.c diff | blob | history
include/dt-bindings/clock/rv1108-cru.h diff | blob | history
Cloned from git://git.denx.de/u-boot.git