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(parent: 168e5bc) | patch
powerpc mpc85xx: Only clear TSR:WIS in watchdog_reset.
authorMark Marshall <mark.marshall@omicron.at>
Sun, 9 Sep 2012 23:06:03 +0000 (23:06 +0000)
committerAndy Fleming <afleming@freescale.com>
Mon, 22 Oct 2012 08:04:27 +0000 (03:04 -0500)
commit320d53da605d67b9d95622c5c6bfd5ac2c17ed58
tree6e49a326f648a59146039ba6b3c111d40a795b8atree | snapshot
parent168e5bc4095177764edaff306c9d4674a6f7f5e6commit | diff
powerpc mpc85xx: Only clear TSR:WIS in watchdog_reset.

We should only write TSR_WIS to the SPRN_TSR register in
reset_85xx_watchdog.

The old code would cause the timer interrupt to be acknowledged when the
watchdog was reset, and we would then get no more timer interrupts.
This bug would affect all mpc85xx boards that have the watchdog enabled.

Signed-off-by: Mark Marshall <Mark.Marshall@omicron.at>
Signed-off-by: Andy Fleming <afleming@freescale.com>
arch/powerpc/cpu/mpc85xx/cpu.c diff | blob | history
Cloned from git://git.denx.de/u-boot.git