]> git.sur5r.net Git - u-boot/commit
[PATCH] PPC4xx: Add 440SP(e) DDR2 SPD DIMM support
authorStefan Roese <sr@denx.de>
Tue, 20 Feb 2007 09:43:34 +0000 (10:43 +0100)
committerStefan Roese <sr@denx.de>
Tue, 20 Feb 2007 09:43:34 +0000 (10:43 +0100)
commit4037ed3b63923cfcec27f784a89057c3cbabcedb
treeea1ced56a2dab67f408a9cddccaf6c1d3f4100e0
parent36d830c9830379045f5daa9f542ac1c990c70068
[PATCH] PPC4xx: Add 440SP(e) DDR2 SPD DIMM support

This patch adds support for the DDR2 controller used on the
440SP and 440SPe. It is tested on the Katmai (440SPe) eval
board and works fine with the following DIMM modules:

- Corsair CM2X512-5400C4 (512MByte per DIMM)
- Kingston ValueRAM KVR667D2N5/512 (512MByte per DIMM)
- Kingston ValueRAM KVR667D2N5K2/2G (1GByte per DIMM)

This patch also adds the nice functionality to dynamically
create the TLB entries for the SDRAM (tlb.c). So we should
never run into such problems with wrong (too short) TLB
initialization again on these platforms.

Signed-off-by: Stefan Roese <sr@denx.de>
cpu/ppc4xx/44x_spd_ddr2.c [new file with mode: 0644]
cpu/ppc4xx/tlb.c [new file with mode: 0644]
include/asm-ppc/mmu.h