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ARM: mxs: Configure 2 Gbit DDR2 RAM for BG0900
authorChristoph G. Baumann <c.baumann@ppc-ag.de>
Mon, 28 Oct 2013 11:29:31 +0000 (12:29 +0100)
committerStefano Babic <sbabic@denx.de>
Thu, 31 Oct 2013 16:54:23 +0000 (17:54 +0100)
commit465ac5891c0302d33a59700711f3f0f1e81392fa
treec047693a9974b64722eb83e031a15e1b6209f608tree | snapshot
parenta0f97610757d6370fc58849032b36a94b4167fdccommit | diff
ARM: mxs: Configure 2 Gbit DDR2 RAM for BG0900

The BG0900 module has 2Gbit DRAM module on it, adjust the DataBahn
DRAM controller registers so the DRAM module will be correctly
recognised.

Signed-off-by: Christoph G. Baumann <c.baumann@ppc-ag.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
board/ppcag/bg0900/spl_boot.c diff | blob | history
Cloned from git://git.denx.de/u-boot.git