]> git.sur5r.net Git - u-boot/commit
Add ddr interleaving suppport for MPC8572DS board
authorHaiying Wang <Haiying.Wang@freescale.com>
Fri, 3 Oct 2008 16:37:41 +0000 (12:37 -0400)
committerWolfgang Denk <wd@denx.de>
Sat, 18 Oct 2008 19:54:05 +0000 (21:54 +0200)
commit4ca06607d60d0a6378812ef58fd1eab2a7f77111
treee145c64ad608f727c0d0f2cbcb54cbeca1c507eb
parent1f293b417ac6ab8e317ca2b770377ca93edf2370
Add ddr interleaving suppport for MPC8572DS board

* Add board specific parameter table to choose correct cpo, clk_adjust,
write_data_delay, 2T based on board ddr frequency and n_ranks.

* Set odt_rd_cfg and odt_wr_cfg based on the dimm# and CS#.

* Set memory controller interleaving mode to bank interleaving, and disable
bank(chip select) interleaving mode by default, because the default on-board
DDR DIMMs are 2x512MB single-rank.

* Change CONFIG_ICS307_REFCLK_HZ from 33333333 to 33333000.

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
board/freescale/mpc8572ds/ddr.c
include/configs/MPC8572DS.h