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(parent: 4efe20c) | patch
Introduce PLL_CFG[0:4] table for processor 7448/7447A/7455/7457. The original
authorroy zang <tie-fei.zang@freescale.com>
Mon, 4 Dec 2006 09:54:21 +0000 (17:54 +0800)
committerZang Tiefei <roy@bus.ap.freescale.net>
Mon, 4 Dec 2006 09:54:21 +0000 (17:54 +0800)
commit4dbcd69e3e2776ea334590d5768e3692c5fae5c1
treef14a1b9562b8a71f77855e748716c373cf1749c6tree | snapshot
parent4efe20c9579011d9987f62ed7d35ee8cdc1cf0e0commit | diff
Introduce PLL_CFG[0:4] table for processor 7448/7447A/7455/7457. The original
multiplier table can not refect the real PLL clock behavior of these
processors. Please refer to the hardware specification for detailed
information of the corresponding processors.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
cpu/74xx_7xx/speed.c diff | blob | history
Cloned from git://git.denx.de/u-boot.git