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rockchip: clk: rk3128: fix DCLK_VOP_DIV_CON_MASK
authorPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Fri, 1 Dec 2017 23:19:14 +0000 (00:19 +0100)
committerPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Fri, 1 Dec 2017 23:27:42 +0000 (00:27 +0100)
commit4fc495e9e2e497afee383294a6ee9212e9a8bd73
treec093c150990b48a03d950bb533cf008f404be761tree | snapshot
parentcd401abcd532c59cdaaf6ffeed762386c1813e58commit | diff
rockchip: clk: rk3128: fix DCLK_VOP_DIV_CON_MASK

The DCLK_VOP_DIV_CON_MASK should cover only bits 8 through 15.
Fix this to remove an "integer-overflow on shifted constant" warning.

Fixes: 9246d9e ("rockchip: rk3128: add clock driver")
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
arch/arm/include/asm/arch-rockchip/cru_rk3128.h diff | blob | history
Cloned from git://git.denx.de/u-boot.git