git.sur5r.net Git - u-boot/commit

]> git.sur5r.net Git - u-boot/commit

author	Shengzhou Liu <Shengzhou.Liu@nxp.com>
	Tue, 31 May 2016 07:39:06 +0000 (15:39 +0800)
committer	York Sun <york.sun@nxp.com>
	Sat, 4 Jun 2016 05:12:54 +0000 (22:12 -0700)
commit	534992827756c3a1ab49823ca487702a954fe433
tree	f00bfe6d3ebd02c921963584bb491fa63c7aa151	tree \| snapshot
parent	ed4708aaeaf74008d199866bfbd450d91439a9cf	commit \| diff

board/freescale: Use unified setup_ddr_tlbs for spl boot and non-spl boot

We should use unified setup_ddr_tlbs() for spl boot and non-spl boot
to make sure 'M' bit is set for DDR TLB to maintain cache coherence.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

Cloned from git://git.denx.de/u-boot.git

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board/freescale/b4860qds/ddr.c		diff \| blob \| history
board/freescale/t102xqds/ddr.c		diff \| blob \| history
board/freescale/t102xrdb/ddr.c		diff \| blob \| history
board/freescale/t104xrdb/ddr.c		diff \| blob \| history
board/freescale/t208xqds/ddr.c		diff \| blob \| history
board/freescale/t208xrdb/ddr.c		diff \| blob \| history
board/freescale/t4qds/ddr.c		diff \| blob \| history
board/freescale/t4rdb/ddr.c		diff \| blob \| history