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(parent: 14d5547) | patch
drivers/ddr/fsl: Adjust bstopre value
authorYork Sun <yorksun@freescale.com>
Thu, 23 Jul 2015 21:04:48 +0000 (14:04 -0700)
committerYork Sun <yorksun@freescale.com>
Mon, 3 Aug 2015 19:06:38 +0000 (12:06 -0700)
commit56848428a88f89420ae7acc04bb5805e70c430a3
treedacf689050c9dacae1c7ad899704298f6a7626c3tree | snapshot
parent14d5547cf158c18bc340f01424e011b0802a6bb0commit | diff
drivers/ddr/fsl: Adjust bstopre value

By default the bstopre value has been set to 0x100, used to be 1/4
value of refint. Modern DDR has increased the refresh time. Adjust
to 1/4 of refresh interval dynamically. Individual board can still
override this value in board ddr file, or to use auto-precharge.

Signed-off-by: York Sun <yorksun@freescale.com>
drivers/ddr/fsl/main.c diff | blob | history
drivers/ddr/fsl/options.c diff | blob | history
include/fsl_ddr.h diff | blob | history
Cloned from git://git.denx.de/u-boot.git