]> git.sur5r.net Git - u-boot/commit
tegra: Correct logic for reading pll_misc in clock_start_pll()
authorSimon Glass <sjg@chromium.org>
Mon, 10 Aug 2015 13:14:36 +0000 (07:14 -0600)
committerTom Warren <twarren@nvidia.com>
Thu, 13 Aug 2015 20:06:04 +0000 (13:06 -0700)
commit5a30cee5d05f0ef0470b85f94907022704598253
treec0cf4cf1f57b09c09be1dfd12a543b991a82ce0d
parent35f590f4c3300f1aa6bcd2c69ff2f96839cdd85c
tegra: Correct logic for reading pll_misc in clock_start_pll()

The logic for simple PLLs on T124 was broken by this commit:

  722e000c Tegra: PLL: use per-SoC pllinfo table instead of PLL_DIVM/N/P, etc.

Correct it by reading from the same pll_misc register that it writes to and
adding an entry for the DP PLL in the pllinfo table.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
arch/arm/mach-tegra/clock.c
arch/arm/mach-tegra/tegra124/clock.c
arch/arm/mach-tegra/tegra210/clock.c