git.sur5r.net Git - u-boot/commit

author	Bin Meng <bmeng.cn@gmail.com>
	Sat, 15 Aug 2015 20:37:50 +0000 (14:37 -0600)
committer	Simon Glass <sjg@chromium.org>
	Wed, 26 Aug 2015 14:54:09 +0000 (07:54 -0700)
commit	5fb0151697088e257e0190d414cc7b2e2793b485
tree	27236bb2d0973b0666a0ed59a29640b4b29a9fa2	tree \| snapshot
parent	5c113ff79c601d69ce08803c7238679d8c7abd13	commit \| diff

x86: baytrail: Support multiple microcode copies

Intel FSP has the capability to walk through the microcode blocks
which are passed as the TempRamInit() parameter from U-Boot and
finds the most appropriate microcode which is suitable for the cpu
on which it is running. Now we've seen several steppings for Intel
BayTrail series processors, adding those microcodes to the Intel
BayleyBay and MinnowMax board device tree files.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>

arch/x86/dts/bayleybay.dts		diff \| blob \| history
arch/x86/dts/minnowmax.dts		diff \| blob \| history