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(parent: 3313b20) | patch
powerpc/85xx: Optimized DDR settings for 800MT/s on P1/P2 RDB
authorPoonam Aggrwal <poonam.aggrwal@freescale.com>
Mon, 7 Feb 2011 11:47:28 +0000 (17:17 +0530)
committerKumar Gala <galak@kernel.crashing.org>
Mon, 4 Apr 2011 14:24:42 +0000 (09:24 -0500)
commit66c74fca18aab4c4182be486641d7a374689c4c3
treefe5db1cbbaf69695c37d8e783cfee0af67923b80tree | snapshot
parent3313b20b950060723e6897870f793db7d3582084commit | diff
powerpc/85xx: Optimized DDR settings for 800MT/s on P1/P2 RDB

Changed the following DDR timing parameters for 800Mt/s:
tRRT    BL/2+1 to  BL/2
tWWT    BL/2+1 to  BL/2
tWRT    BL/2+1 to  BL/2
tRWT    BL/2+1 to  BL/2
REFINT  6500ns to  7800ns

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
board/freescale/p1_p2_rdb/ddr.c diff | blob | history
Cloned from git://git.denx.de/u-boot.git