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(parent: 2889659) | patch
net: zynq: Fix MDC setting for zynq
authorMichal Simek <michal.simek@xilinx.com>
Tue, 8 Sep 2015 15:07:01 +0000 (17:07 +0200)
committerMichal Simek <michal.simek@xilinx.com>
Thu, 19 Nov 2015 13:03:05 +0000 (14:03 +0100)
commit6777f3863044bf58082a3fdd67a890f2b5080e14
tree16507228d3b767be0d3ef7d02c0fcf9b1687dda8tree | snapshot
parent2889659a5510558f55c50c51a29bd701792536fdcommit | diff
net: zynq: Fix MDC setting for zynq

Based on spec:
"MDC must not exceed 2.5 MHz (MDC is only active during MDIO read and
write operations)"
Zynq is running on 111MHz. Current setting is 32 which is 111/32=3.47
which is above of 2.5MHz.
Using 48 divider will give us correct setting according spec
(111/48=2.31).

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
drivers/net/zynq_gem.c diff | blob | history
Cloned from git://git.denx.de/u-boot.git