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(parent: 69c7826) | patch
powerpc/mpc85xx: Enable L2 at the beginning of U-boot for E6500
authorYork Sun <yorksun@freescale.com>
Mon, 8 Oct 2012 07:44:08 +0000 (07:44 +0000)
committerAndy Fleming <afleming@freescale.com>
Mon, 22 Oct 2012 19:31:15 +0000 (14:31 -0500)
commit6d2b9da19cbfe0b7da7e9ae0bf2a1a000f2e2804
tree0fa435d86fef19ff6a83eedcc6c1c1f26527f8c5tree | snapshot
parent69c7826759a69456df2a47fa4ef5dde19ab87e62commit | diff
powerpc/mpc85xx: Enable L2 at the beginning of U-boot for E6500

Using E6500 L1 cache as initram requires L2 cache enabled.
Add l2-cache cluster enabling.

Setup stash id for L1 cache as (coreID) * 2 + 32 + 0
Setup stash id for L2 cache as (cluster) * 2 + 32 + 1
Stash id for L2 is only set for Chassis 2.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
arch/powerpc/cpu/mpc85xx/cpu_init.c diff | blob | history
arch/powerpc/cpu/mpc85xx/fdt.c diff | blob | history
arch/powerpc/cpu/mpc85xx/release.S diff | blob | history
arch/powerpc/cpu/mpc85xx/start.S diff | blob | history
arch/powerpc/include/asm/immap_85xx.h diff | blob | history
Cloned from git://git.denx.de/u-boot.git