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(parent: 1b811e2) | patch
imx: mx6: ddr add mpzqlp2ctl entry
authorPeng Fan <Peng.Fan@freescale.com>
Mon, 17 Aug 2015 08:11:01 +0000 (16:11 +0800)
committerStefano Babic <sbabic@denx.de>
Wed, 2 Sep 2015 13:34:12 +0000 (15:34 +0200)
commit775d591f5d6e9266642c89d731b22263fc07e1c6
tree2a875c3e4c1ae5b70bbdd4944326727fb9bb433dtree | snapshot
parent1b811e285c257a9f9545b9f0efad423541bb89e1commit | diff
imx: mx6: ddr add mpzqlp2ctl entry

Add mpzqlp2ctl entry for mx6_mmdc_calibration.
MMDC_MPZQLP2CTL register is for init tZQINIT, tZQCL, tZQCS for LPDDR2 chips.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
arch/arm/include/asm/arch-mx6/mx6-ddr.h diff | blob | history
Cloned from git://git.denx.de/u-boot.git