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(parent: c19e0dd) | patch
ARM: HYP/non-sec: add a barrier after setting SCR.NS==1
authorMarc Zyngier <marc.zyngier@arm.com>
Sat, 12 Jul 2014 13:23:59 +0000 (14:23 +0100)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>
Mon, 28 Jul 2014 15:06:19 +0000 (17:06 +0200)
commit800c83522ca6a7d6fd0b058f423501b4cc52d6d6
treea4865793a45efcb3552f5e9e5cc256ad7f4fab27tree | snapshot
parentc19e0dd7412f5c4bce8c5057c40e747b1acb39e2commit | diff
ARM: HYP/non-sec: add a barrier after setting SCR.NS==1

A CP15 instruction execution can be reordered, requiring an
isb to be sure it is executed in program order.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
arch/arm/cpu/armv7/nonsec_virt.S diff | blob | history
Cloned from git://git.denx.de/u-boot.git