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(parent: 46caebc) | patch
powerpc/mpc85xx: set L2PE in L2CSR0 before enabling L2 cache
authorAneesh Bansal <aneesh.bansal@nxp.com>
Mon, 18 Apr 2016 17:28:33 +0000 (22:58 +0530)
committerYork Sun <york.sun@nxp.com>
Tue, 24 May 2016 17:31:21 +0000 (10:31 -0700)
commit82eda68444fa4d026bcf1f59c7c0d044ddbcb193
treedf6f6a6af8f690c3acc04ce23ad868ca700c3535tree | snapshot
parent46caebc1dff8f456b4f076bbebbb2ba32236d06dcommit | diff
powerpc/mpc85xx: set L2PE in L2CSR0 before enabling L2 cache

While enabling L2 cache, the value of L2PE (L2 cache parity/ECC
error checking enable) must not be changed while the L2 cache is
enabled.
So, L2PE must be set before enabling L2 cache.

Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
arch/powerpc/cpu/mpc85xx/start.S diff | blob | history
Cloned from git://git.denx.de/u-boot.git