]> git.sur5r.net Git - u-boot/commit
Revert "Increase default of CONFIG_SYS_MALLOC_F_LEN for SPL_OF_CONTROL"
authorMasahiro Yamada <yamada.masahiro@socionext.com>
Mon, 19 Sep 2016 12:40:26 +0000 (21:40 +0900)
committerTom Rini <trini@konsulko.com>
Mon, 19 Sep 2016 19:20:09 +0000 (15:20 -0400)
commit9b1b6d42256a4c2e59c803afdbf90d39371e61ba
treef23016c6f6dab180ed5901a02f3ab80c3aaf23ce
parent00709f56975e0fb08374c03aad21ac7d7e61acd0
Revert "Increase default of CONFIG_SYS_MALLOC_F_LEN for SPL_OF_CONTROL"

This reverts commit 90c08d9e08c7a108ab904f3bbdeb558081757892.

I took a closer look at this after the commit was applied, and found
CONFIG_SYS_MALLOC_F_LEN=0x2000 was too much.  8KB memory for SPL is
actually too big for some boards.  Perhaps 0x800 is enough, but the
situation varies board by board.

Let's postpone our decision until we come up with a better idea.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
25 files changed:
Kconfig
configs/clearfog_defconfig
configs/db-88f6720_defconfig
configs/db-88f6820-gp_defconfig
configs/db-mv784mp-gp_defconfig
configs/ds414_defconfig
configs/maxbcm_defconfig
configs/sandbox_spl_defconfig
configs/socfpga_arria5_defconfig
configs/socfpga_cyclone5_defconfig
configs/socfpga_de0_nano_soc_defconfig
configs/socfpga_is1_defconfig
configs/socfpga_mcvevk_defconfig
configs/socfpga_sockit_defconfig
configs/socfpga_socrates_defconfig
configs/socfpga_sr1500_defconfig
configs/socfpga_vining_fpga_defconfig
configs/theadorable_debug_defconfig
configs/theadorable_defconfig
configs/uniphier_ld11_defconfig
configs/uniphier_ld20_defconfig
configs/uniphier_ld4_sld8_defconfig
configs/uniphier_pro4_defconfig
configs/uniphier_pxs2_ld6b_defconfig
configs/uniphier_sld3_defconfig